Unverified Commit 5ea40f71 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

ARM: dts: sunxi: Unify the DE2 bus clocks order 



The DE2 bus takes two clocks, named bus and mod according to the binding.

However, the order of these clocks change from one SoC to another. Even
though it might not be an issue in most cases, having consistency will help
if we ever need to have some code to deal with deprecated bindings, and in
general it's just better.

Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent de332de2

arch/arm/boot/dts/sun8i-a83t.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -314,10 +314,10 @@ soc { 
		display_clocks: clock@1000000 {

			compatible = "allwinner,sun8i-a83t-de2-clk";

			reg = <0x01000000 0x100000>;

			clocks = <&ccu CLK_PLL_DE>,

				 <&ccu CLK_BUS_DE>;

			clock-names = "mod",

				      "bus";

			clocks = <&ccu CLK_BUS_DE>,

				 <&ccu CLK_PLL_DE>;

			clock-names = "bus",

				      "mod";

			resets = <&ccu RST_BUS_DE>;

			#clock-cells = <1>;

			#reset-cells = <1>;

arch/arm/boot/dts/sun8i-r40.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -119,10 +119,10 @@ display_clocks: clock@1000000 { 
			compatible = "allwinner,sun8i-r40-de2-clk",

				     "allwinner,sun8i-h3-de2-clk";

			reg = <0x01000000 0x100000>;

			clocks = <&ccu CLK_DE>,

				 <&ccu CLK_BUS_DE>;

			clock-names = "mod",

				      "bus";

			clocks = <&ccu CLK_BUS_DE>,

				 <&ccu CLK_DE>;

			clock-names = "bus",

				      "mod";

			resets = <&ccu RST_BUS_DE>;

			#clock-cells = <1>;

			#reset-cells = <1>;

arch/arm/boot/dts/sun8i-v3s.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -106,10 +106,10 @@ soc { 
		display_clocks: clock@1000000 {

			compatible = "allwinner,sun8i-v3s-de2-clk";

			reg = <0x01000000 0x100000>;

			clocks = <&ccu CLK_DE>,

				 <&ccu CLK_BUS_DE>;

			clock-names = "mod",

				      "bus";

			clocks = <&ccu CLK_BUS_DE>,

				 <&ccu CLK_DE>;

			clock-names = "bus",

				      "mod";

			resets = <&ccu RST_BUS_DE>;

			#clock-cells = <1>;

			#reset-cells = <1>;

arch/arm/boot/dts/sunxi-h3-h5.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -114,10 +114,10 @@ soc { 
		display_clocks: clock@1000000 {

			/* compatible is in per SoC .dtsi file */

			reg = <0x01000000 0x100000>;

			clocks = <&ccu CLK_DE>,

				 <&ccu CLK_BUS_DE>;

			clock-names = "mod",

				      "bus";

			clocks = <&ccu CLK_BUS_DE>,

				 <&ccu CLK_DE>;

			clock-names = "bus",

				      "mod";

			resets = <&ccu RST_BUS_DE>;

			#clock-cells = <1>;

			#reset-cells = <1>;

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -228,10 +228,10 @@ bus@1000000 { 
			display_clocks: clock@0 {

				compatible = "allwinner,sun50i-a64-de2-clk";

				reg = <0x0 0x100000>;

				clocks = <&ccu CLK_DE>,

					 <&ccu CLK_BUS_DE>;

				clock-names = "mod",

					      "bus";

				clocks = <&ccu CLK_BUS_DE>,

					 <&ccu CLK_DE>;

				clock-names = "bus",

					      "mod";

				resets = <&ccu RST_BUS_DE>;

				#clock-cells = <1>;

				#reset-cells = <1>;