Commit 5ec3def7 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gf100-: rename magic_not_rop_nr to screen_tile_row_offset 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 933ad445

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

+3 −3
Original line number Diff line number Diff line
@@ -1181,20 +1181,20 @@ gf100_grctx_generate_r418bb8(struct gf100_gr *gr) 


	/* GPC_BROADCAST */

	nvkm_wr32(device, 0x418bb8, (gr->tpc_total << 8) |

				 gr->magic_not_rop_nr);

				     gr->screen_tile_row_offset);

	for (i = 0; i < 6; i++)

		nvkm_wr32(device, 0x418b08 + (i * 4), data[i]);



	/* GPC_BROADCAST.TP_BROADCAST */

	nvkm_wr32(device, 0x419bd0, (gr->tpc_total << 8) |

				 gr->magic_not_rop_nr | data2[0]);

				     gr->screen_tile_row_offset | data2[0]);

	nvkm_wr32(device, 0x419be4, data2[1]);

	for (i = 0; i < 6; i++)

		nvkm_wr32(device, 0x419b00 + (i * 4), data[i]);



	/* UNK78xx */

	nvkm_wr32(device, 0x4078bc, (gr->tpc_total << 8) |

				 gr->magic_not_rop_nr);

				     gr->screen_tile_row_offset);

	for (i = 0; i < 6; i++)

		nvkm_wr32(device, 0x40780c + (i * 4), data[i]);

}

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

+3 −3
Original line number Diff line number Diff line
@@ -924,20 +924,20 @@ gk104_grctx_generate_r418bb8(struct gf100_gr *gr) 


	/* GPC_BROADCAST */

	nvkm_wr32(device, 0x418bb8, (gr->tpc_total << 8) |

				 gr->magic_not_rop_nr);

				     gr->screen_tile_row_offset);

	for (i = 0; i < 6; i++)

		nvkm_wr32(device, 0x418b08 + (i * 4), data[i]);



	/* GPC_BROADCAST.TP_BROADCAST */

	nvkm_wr32(device, 0x41bfd0, (gr->tpc_total << 8) |

				 gr->magic_not_rop_nr | data2[0]);

				     gr->screen_tile_row_offset | data2[0]);

	nvkm_wr32(device, 0x41bfe4, data2[1]);

	for (i = 0; i < 6; i++)

		nvkm_wr32(device, 0x41bf00 + (i * 4), data[i]);



	/* UNK78xx */

	nvkm_wr32(device, 0x4078bc, (gr->tpc_total << 8) |

				 gr->magic_not_rop_nr);

				     gr->screen_tile_row_offset);

	for (i = 0; i < 6; i++)

		nvkm_wr32(device, 0x40780c + (i * 4), data[i]);

}

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

+12 −12
Original line number Diff line number Diff line
@@ -1651,38 +1651,38 @@ gf100_gr_oneinit(struct nvkm_gr *base) 
	switch (device->chipset) {

	case 0xc0:

		if (gr->tpc_total == 11) { /* 465, 3/4/4/0, 4 */

			gr->magic_not_rop_nr = 0x07;

			gr->screen_tile_row_offset = 0x07;

		} else

		if (gr->tpc_total == 14) { /* 470, 3/3/4/4, 5 */

			gr->magic_not_rop_nr = 0x05;

			gr->screen_tile_row_offset = 0x05;

		} else

		if (gr->tpc_total == 15) { /* 480, 3/4/4/4, 6 */

			gr->magic_not_rop_nr = 0x06;

			gr->screen_tile_row_offset = 0x06;

		}

		break;

	case 0xc3: /* 450, 4/0/0/0, 2 */

		gr->magic_not_rop_nr = 0x03;

		gr->screen_tile_row_offset = 0x03;

		break;

	case 0xc4: /* 460, 3/4/0/0, 4 */

		gr->magic_not_rop_nr = 0x01;

		gr->screen_tile_row_offset = 0x01;

		break;

	case 0xc1: /* 2/0/0/0, 1 */

		gr->magic_not_rop_nr = 0x01;

		gr->screen_tile_row_offset = 0x01;

		break;

	case 0xc8: /* 4/4/3/4, 5 */

		gr->magic_not_rop_nr = 0x06;

		gr->screen_tile_row_offset = 0x06;

		break;

	case 0xce: /* 4/4/0/0, 4 */

		gr->magic_not_rop_nr = 0x03;

		gr->screen_tile_row_offset = 0x03;

		break;

	case 0xcf: /* 4/0/0/0, 3 */

		gr->magic_not_rop_nr = 0x03;

		gr->screen_tile_row_offset = 0x03;

		break;

	case 0xd7:

	case 0xd9: /* 1/0/0/0, 1 */

	case 0xea: /* gk20a */

	case 0x12b: /* gm20b */

		gr->magic_not_rop_nr = 0x01;

		gr->screen_tile_row_offset = 0x01;

		break;

	}
@@ -1851,7 +1851,7 @@ gf100_gr_init(struct gf100_gr *gr) 


	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {

		nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),

			gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]);

			  gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);

		nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |

							 gr->tpc_total);

		nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h

+1 −1
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ struct gf100_gr { 
	u32  size;

	u32 *data;



	u8 magic_not_rop_nr;

	u8 screen_tile_row_offset;

};



int gf100_gr_ctor(const struct gf100_gr_func *, struct nvkm_device *,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c

+2 −2
Original line number Diff line number Diff line
@@ -218,7 +218,7 @@ gk104_gr_init(struct gf100_gr *gr) 


	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {

		nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),

			gr->magic_not_rop_nr << 8 | gr->tpc_nr[gpc]);

			  gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);

		nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |

							 gr->tpc_total);

		nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);