Commit 5f47c387 authored by Russell King's avatar Russell King
Browse files

ARM: l2c: add decode for L2C-220 cache ways 



Rather than assuming these are always 8-way, it can be decoded from the
auxillary register in the same manner as L2C-210.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 051334bd

arch/arm/mm/cache-l2x0.c

+1 −0
Original line number Diff line number Diff line
@@ -701,6 +701,7 @@ static void __init __l2c_init(const struct l2c_init_data *data, 
		break;



	case L2X0_CACHE_ID_PART_L210:

	case L2X0_CACHE_ID_PART_L220:

		ways = (aux >> 13) & 0xf;

		break;