Commit 5f6e839e authored by Krister Johansen's avatar Krister Johansen Committed by Juergen Gross
Browse files

xen: update arch/x86/include/asm/xen/cpuid.h 



Update arch/x86/include/asm/xen/cpuid.h from the Xen tree to get newest
definitions.  This picks up some TSC mode definitions and comment
formatting changes.

Signed-off-by: default avatarKrister Johansen <kjlx@templeofstupid.com>
Reviewed-by: default avatarJuergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/94b9046dd0db3794f0633d134b7108508957758d.1677038165.git.kjlx@templeofstupid.com


Signed-off-by: default avatarJuergen Gross <jgross@suse.com>
parent 4ecc96cb

arch/x86/include/asm/xen/cpuid.h

+18 −4
Original line number Diff line number Diff line
@@ -89,11 +89,21 @@ 
 * Sub-leaf 2: EAX: host tsc frequency in kHz

 */



#define XEN_CPUID_TSC_EMULATED               (1u << 0)

#define XEN_CPUID_HOST_TSC_RELIABLE          (1u << 1)

#define XEN_CPUID_RDTSCP_INSTR_AVAIL         (1u << 2)



#define XEN_CPUID_TSC_MODE_DEFAULT           (0)

#define XEN_CPUID_TSC_MODE_ALWAYS_EMULATE    (1u)

#define XEN_CPUID_TSC_MODE_NEVER_EMULATE     (2u)

#define XEN_CPUID_TSC_MODE_PVRDTSCP          (3u)



/*

 * Leaf 5 (0x40000x04)

 * HVM-specific features

 * Sub-leaf 0: EAX: Features

 * Sub-leaf 0: EBX: vcpu id (iff EAX has XEN_HVM_CPUID_VCPU_ID_PRESENT flag)

 * Sub-leaf 0: ECX: domain id (iff EAX has XEN_HVM_CPUID_DOMID_PRESENT flag)

 */

#define XEN_HVM_CPUID_APIC_ACCESS_VIRT (1u << 0) /* Virtualized APIC registers */

#define XEN_HVM_CPUID_X2APIC_VIRT      (1u << 1) /* Virtualized x2APIC accesses */
@@ -102,12 +112,16 @@ 
#define XEN_HVM_CPUID_VCPU_ID_PRESENT  (1u << 3) /* vcpu id is present in EBX */

#define XEN_HVM_CPUID_DOMID_PRESENT    (1u << 4) /* domid is present in ECX */

/*

 * Bits 55:49 from the IO-APIC RTE and bits 11:5 from the MSI address can be

 * used to store high bits for the Destination ID. This expands the Destination

 * ID field from 8 to 15 bits, allowing to target APIC IDs up 32768.

 * With interrupt format set to 0 (non-remappable) bits 55:49 from the

 * IO-APIC RTE and bits 11:5 from the MSI address can be used to store

 * high bits for the Destination ID. This expands the Destination ID

 * field from 8 to 15 bits, allowing to target APIC IDs up 32768.

 */

#define XEN_HVM_CPUID_EXT_DEST_ID      (1u << 5)

/* Per-vCPU event channel upcalls */

/*

 * Per-vCPU event channel upcalls work correctly with physical IRQs

 * bound to event channels.

 */

#define XEN_HVM_CPUID_UPCALL_VECTOR    (1u << 6)



/*