Commit 5fe4beaa authored by Vinod Koul's avatar Vinod Koul
Browse files

Merge TI ringacc driver from Santosh 



This is for dependency of new TI ringacc dmaengine drivers

Merge tag 'drivers_soc_for_5.6' into topic/ti

SOC: TI Keystone Ring Accelerator driver

The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
enable straightforward passing of work between a producer and a consumer.
There is one RINGACC module per NAVSS on TI AM65x SoCs.

Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parents 4d3df168 3277e8aa

Documentation/devicetree/bindings/soc/ti/k3-ringacc.txt

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* Texas Instruments K3 NavigatorSS Ring Accelerator



The Ring Accelerator (RA) is a machine which converts read/write accesses

from/to a constant address into corresponding read/write accesses from/to a

circular data structure in memory. The RA eliminates the need for each DMA

controller which needs to access ring elements from having to know the current

state of the ring (base address, current offset). The DMA controller

performs a read or write access to a specific address range (which maps to the

source interface on the RA) and the RA replaces the address for the transaction

with a new address which corresponds to the head or tail element of the ring

(head for reads, tail for writes).



The Ring Accelerator is a hardware module that is responsible for accelerating

management of the packet queues. The K3 SoCs can have more than one RA instances



Required properties:

- compatible	: Must be "ti,am654-navss-ringacc";

- reg		: Should contain register location and length of the following

		  named register regions.

- reg-names	: should be

		  "rt" - The RA Ring Real-time Control/Status Registers

		  "fifos" - The RA Queues Registers

		  "proxy_gcfg" - The RA Proxy Global Config Registers

		  "proxy_target" - The RA Proxy Datapath Registers

- ti,num-rings	: Number of rings supported by RA

- ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range

- ti,sci	: phandle on TI-SCI compatible System controller node

- ti,sci-dev-id	: TI-SCI device id of the ring accelerator

- msi-parent	: phandle for "ti,sci-inta" interrupt controller



Optional properties:

 -- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability

		  issue software w/a



Example:



ringacc: ringacc@3c000000 {

	compatible = "ti,am654-navss-ringacc";

	reg =	<0x0 0x3c000000 0x0 0x400000>,

		<0x0 0x38000000 0x0 0x400000>,

		<0x0 0x31120000 0x0 0x100>,

		<0x0 0x33000000 0x0 0x40000>;

	reg-names = "rt", "fifos",

		    "proxy_gcfg", "proxy_target";

	ti,num-rings = <818>;

	ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */

	ti,dma-ring-reset-quirk;

	ti,sci = <&dmsc>;

	ti,sci-dev-id = <187>;

	msi-parent = <&inta_main_udmass>;

};



client:



dma_ipx: dma_ipx@<addr> {

	...

	ti,ringacc = <&ringacc>;

	...

}

drivers/soc/ti/Kconfig

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@@ -80,6 +80,17 @@ config TI_SCI_PM_DOMAINS 
	  called ti_sci_pm_domains. Note this is needed early in boot before

	  rootfs may be available.



config TI_K3_RINGACC

	bool "K3 Ring accelerator Sub System"

	depends on ARCH_K3 || COMPILE_TEST

	depends on TI_SCI_INTA_IRQCHIP

	help

	  Say y here to support the K3 Ring accelerator module.

	  The Ring Accelerator (RINGACC or RA)  provides hardware acceleration

	  to enable straightforward passing of work between a producer

	  and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs

	  If unsure, say N.



endif # SOC_TI



config TI_SCI_INTA_MSI_DOMAIN

drivers/soc/ti/Makefile

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@@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_prm.o 
obj-$(CONFIG_WKUP_M3_IPC)		+= wkup_m3_ipc.o

obj-$(CONFIG_TI_SCI_PM_DOMAINS)		+= ti_sci_pm_domains.o

obj-$(CONFIG_TI_SCI_INTA_MSI_DOMAIN)	+= ti_sci_inta_msi.o

obj-$(CONFIG_TI_K3_RINGACC)		+= k3-ringacc.o