Commit 6175f658 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

ARM: dts: s5pv210: re-order MFC clock names to match Exynos and bindings 

Align the order of two MFC clocks with Exynos4 DTS and MFC bindings

Link: https://lore.kernel.org/r/20230328114729.61436-1-aakarsh.jain@samsung.com
Link: https://lore.kernel.org/r/20230421095721.31857-3-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 64f92c24

arch/arm/boot/dts/s5pv210.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -452,8 +452,8 @@ mfc: codec@f1700000 { 
			reg = <0xf1700000 0x10000>;

			interrupt-parent = <&vic2>;

			interrupts = <14>;

			clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;

			clock-names = "sclk_mfc", "mfc";

			clocks = <&clocks CLK_MFC>, <&clocks DOUT_MFC>;

			clock-names = "mfc", "sclk_mfc";

		};



		vic0: interrupt-controller@f2000000 {