Commit 63d8c242 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Alexei Starovoitov
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bpf, docs: Better document the regular load and store instructions



Add a separate section and a little intro blurb for the regular load and
store instructions.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20220131183638.3934982-3-hch@lst.de
parent dd33fb57
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+12 −5
Original line number Diff line number Diff line
@@ -215,23 +215,30 @@ The mode modifier is one of:
  BPF_IMM        0x00   used for 64-bit mov
  BPF_ABS        0x20   legacy BPF packet access
  BPF_IND        0x40   legacy BPF packet access
  BPF_MEM        0x60   all normal load and store operations
  BPF_MEM        0x60   regular load and store operations
  BPF_ATOMIC     0xc0   atomic operations
  =============  =====  ====================================

BPF_MEM | <size> | BPF_STX means::

Regular load and store operations
---------------------------------

The ``BPF_MEM`` mode modifier is used to encode regular load and store
instructions that transfer data between a register and memory.

``BPF_MEM | <size> | BPF_STX`` means::

  *(size *) (dst_reg + off) = src_reg

BPF_MEM | <size> | BPF_ST means::
``BPF_MEM | <size> | BPF_ST`` means::

  *(size *) (dst_reg + off) = imm32

BPF_MEM | <size> | BPF_LDX means::
``BPF_MEM | <size> | BPF_LDX`` means::

  dst_reg = *(size *) (src_reg + off)

Where size is one of: BPF_B or BPF_H or BPF_W or BPF_DW.
Where size is one of: ``BPF_B``, ``BPF_H``, ``BPF_W``, or ``BPF_DW``.

Atomic operations
-----------------