Commit 64851603 authored by Leo Yan's avatar Leo Yan Committed by Wei Xu
Browse files

arm64: dts: Add L2 cache topology to Hi6220 



This patch adds the L2 cache topology on Hi6220. Hi6220 has two
clusters, every cluster has 512KiB L2 cache (32KiB x 16 ways).

Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent cd0b69ec

arch/arm64/boot/dts/hisilicon/hi6220.dtsi

+16 −0
Original line number Original line Diff line number Diff line
@@ -83,6 +83,7 @@ cpu0: cpu@0 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x0>;

			reg = <0x0 0x0>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			clocks = <&stub_clock 0>;

			clocks = <&stub_clock 0>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cooling-min-level = <4>;

			cooling-min-level = <4>;
@@ -97,6 +98,7 @@ cpu1: cpu@1 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x1>;

			reg = <0x0 0x1>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};
@@ -106,6 +108,7 @@ cpu2: cpu@2 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x2>;

			reg = <0x0 0x2>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};
@@ -115,6 +118,7 @@ cpu3: cpu@3 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x3>;

			reg = <0x0 0x3>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};
@@ -124,6 +128,7 @@ cpu4: cpu@100 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x100>;

			reg = <0x0 0x100>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};
@@ -133,6 +138,7 @@ cpu5: cpu@101 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x101>;

			reg = <0x0 0x101>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};
@@ -142,6 +148,7 @@ cpu6: cpu@102 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x102>;

			reg = <0x0 0x102>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};
@@ -151,9 +158,18 @@ cpu7: cpu@103 { 
			device_type = "cpu";

			device_type = "cpu";

			reg = <0x0 0x103>;

			reg = <0x0 0x103>;

			enable-method = "psci";

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};

		};



		CLUSTER0_L2: l2-cache0 {

			compatible = "cache";

		};



		CLUSTER1_L2: l2-cache1 {

			compatible = "cache";

		};

	};

	};





	cpu_opp_table: cpu_opp_table {

	cpu_opp_table: cpu_opp_table {