Commit 65183fae authored by Stanley.Yang's avatar Stanley.Yang Committed by Alex Deucher
Browse files

drm/amdgpu: Add RAS table v2.1 macro definition 



Add RAS EEPROM table version 2.1 macro definition.

Signed-off-by: default avatarStanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 71c79a19

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c

+13 −0
Original line number Diff line number Diff line
@@ -80,6 +80,15 @@ 
#define RAS_MAX_RECORD_COUNT    ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE) \

				 / RAS_TABLE_RECORD_SIZE)



/* EEPROM Table V2_1 */

#define RAS_TABLE_V2_1_INFO_SIZE       256

#define RAS_TABLE_V2_1_INFO_START      RAS_TABLE_HEADER_SIZE

#define RAS_RECORD_START_V2_1          (RAS_HDR_START + RAS_TABLE_HEADER_SIZE + \

					RAS_TABLE_V2_1_INFO_SIZE)

#define RAS_MAX_RECORD_COUNT_V2_1      ((RAS_TBL_SIZE_BYTES - RAS_TABLE_HEADER_SIZE - \

					RAS_TABLE_V2_1_INFO_SIZE) \

					/ RAS_TABLE_RECORD_SIZE)



/* Given a zero-based index of an EEPROM RAS record, yields the EEPROM

 * offset off of RAS_TABLE_START.  That is, this is something you can

 * add to control->i2c_address, and then tell I2C layer to read
@@ -102,6 +111,10 @@ 
#define RAS_NUM_RECS(_tbl_hdr)  (((_tbl_hdr)->tbl_size - \

				  RAS_TABLE_HEADER_SIZE) / RAS_TABLE_RECORD_SIZE)



#define RAS_NUM_RECS_V2_1(_tbl_hdr)  (((_tbl_hdr)->tbl_size - \

				       RAS_TABLE_HEADER_SIZE - \

				       RAS_TABLE_V2_1_INFO_SIZE) / RAS_TABLE_RECORD_SIZE)



#define to_amdgpu_device(x) (container_of(x, struct amdgpu_ras, eeprom_control))->adev



static bool __is_ras_eeprom_supported(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include <linux/i2c.h>



#define RAS_TABLE_VER_V1           0x00010000

#define RAS_TABLE_VER_V2_1         0x00021000



struct amdgpu_device;