Unverified Commit 66fda8bd authored by Mark Brown's avatar Mark Brown
Browse files

Merge existing fixes from spi/for-5.17 into new branch

parents e783362e 9df15d84

drivers/spi/spi-stm32-qspi.c

+17 −30
Original line number Original line Diff line number Diff line
@@ -688,7 +688,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	struct resource *res;

	struct resource *res;

	int ret, irq;

	int ret, irq;





	ctrl = spi_alloc_master(dev, sizeof(*qspi));

	ctrl = devm_spi_alloc_master(dev, sizeof(*qspi));

	if (!ctrl)

	if (!ctrl)

		return -ENOMEM;

		return -ENOMEM;
@@ -697,58 +697,46 @@ static int stm32_qspi_probe(struct platform_device *pdev) 




	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi");

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi");

	qspi->io_base = devm_ioremap_resource(dev, res);

	qspi->io_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(qspi->io_base)) {

	if (IS_ERR(qspi->io_base))

		ret = PTR_ERR(qspi->io_base);

		return PTR_ERR(qspi->io_base);

		goto err_master_put;

	}





	qspi->phys_base = res->start;

	qspi->phys_base = res->start;





	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi_mm");

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi_mm");

	qspi->mm_base = devm_ioremap_resource(dev, res);

	qspi->mm_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(qspi->mm_base)) {

	if (IS_ERR(qspi->mm_base))

		ret = PTR_ERR(qspi->mm_base);

		return PTR_ERR(qspi->mm_base);

		goto err_master_put;

	}





	qspi->mm_size = resource_size(res);

	qspi->mm_size = resource_size(res);

	if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ) {

	if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ)

		ret = -EINVAL;

		return -EINVAL;

		goto err_master_put;

	}





	irq = platform_get_irq(pdev, 0);

	irq = platform_get_irq(pdev, 0);

	if (irq < 0) {

	if (irq < 0)

		ret = irq;

		return irq;

		goto err_master_put;

	}





	ret = devm_request_irq(dev, irq, stm32_qspi_irq, 0,

	ret = devm_request_irq(dev, irq, stm32_qspi_irq, 0,

			       dev_name(dev), qspi);

			       dev_name(dev), qspi);

	if (ret) {

	if (ret) {

		dev_err(dev, "failed to request irq\n");

		dev_err(dev, "failed to request irq\n");

		goto err_master_put;

		return ret;

	}

	}





	init_completion(&qspi->data_completion);

	init_completion(&qspi->data_completion);

	init_completion(&qspi->match_completion);

	init_completion(&qspi->match_completion);





	qspi->clk = devm_clk_get(dev, NULL);

	qspi->clk = devm_clk_get(dev, NULL);

	if (IS_ERR(qspi->clk)) {

	if (IS_ERR(qspi->clk))

		ret = PTR_ERR(qspi->clk);

		return PTR_ERR(qspi->clk);

		goto err_master_put;

	}





	qspi->clk_rate = clk_get_rate(qspi->clk);

	qspi->clk_rate = clk_get_rate(qspi->clk);

	if (!qspi->clk_rate) {

	if (!qspi->clk_rate)

		ret = -EINVAL;

		return -EINVAL;

		goto err_master_put;

	}





	ret = clk_prepare_enable(qspi->clk);

	ret = clk_prepare_enable(qspi->clk);

	if (ret) {

	if (ret) {

		dev_err(dev, "can not enable the clock\n");

		dev_err(dev, "can not enable the clock\n");

		goto err_master_put;

		return ret;

	}

	}





	rstc = devm_reset_control_get_exclusive(dev, NULL);

	rstc = devm_reset_control_get_exclusive(dev, NULL);
@@ -784,7 +772,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	pm_runtime_enable(dev);

	pm_runtime_enable(dev);

	pm_runtime_get_noresume(dev);

	pm_runtime_get_noresume(dev);





	ret = devm_spi_register_master(dev, ctrl);

	ret = spi_register_master(ctrl);

	if (ret)

	if (ret)

		goto err_pm_runtime_free;

		goto err_pm_runtime_free;
@@ -806,8 +794,6 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	stm32_qspi_dma_free(qspi);

	stm32_qspi_dma_free(qspi);

err_clk_disable:

err_clk_disable:

	clk_disable_unprepare(qspi->clk);

	clk_disable_unprepare(qspi->clk);

err_master_put:

	spi_master_put(qspi->ctrl);





	return ret;

	return ret;

}

}
@@ -817,6 +803,7 @@ static int stm32_qspi_remove(struct platform_device *pdev) 
	struct stm32_qspi *qspi = platform_get_drvdata(pdev);

	struct stm32_qspi *qspi = platform_get_drvdata(pdev);





	pm_runtime_get_sync(qspi->dev);

	pm_runtime_get_sync(qspi->dev);

	spi_unregister_master(qspi->ctrl);

	/* disable qspi */

	/* disable qspi */

	writel_relaxed(0, qspi->io_base + QSPI_CR);

	writel_relaxed(0, qspi->io_base + QSPI_CR);

	stm32_qspi_dma_free(qspi);

	stm32_qspi_dma_free(qspi);

drivers/spi/spi-stm32.c

+4 −3
Original line number Original line Diff line number Diff line
@@ -221,7 +221,6 @@ struct stm32_spi; 
 * time between frames (if driver has this functionality)

 * time between frames (if driver has this functionality)

 * @set_number_of_data: optional routine to configure registers to desired

 * @set_number_of_data: optional routine to configure registers to desired

 * number of data (if driver has this functionality)

 * number of data (if driver has this functionality)

 * @can_dma: routine to determine if the transfer is eligible for DMA use

 * @transfer_one_dma_start: routine to start transfer a single spi_transfer

 * @transfer_one_dma_start: routine to start transfer a single spi_transfer

 * using DMA

 * using DMA

 * @dma_rx_cb: routine to call after DMA RX channel operation is complete

 * @dma_rx_cb: routine to call after DMA RX channel operation is complete
@@ -232,7 +231,7 @@ struct stm32_spi; 
 * @baud_rate_div_min: minimum baud rate divisor

 * @baud_rate_div_min: minimum baud rate divisor

 * @baud_rate_div_max: maximum baud rate divisor

 * @baud_rate_div_max: maximum baud rate divisor

 * @has_fifo: boolean to know if fifo is used for driver

 * @has_fifo: boolean to know if fifo is used for driver

 * @has_startbit: boolean to know if start bit is used to start transfer

 * @flags: compatible specific SPI controller flags used at registration time

 */

 */

struct stm32_spi_cfg {

struct stm32_spi_cfg {

	const struct stm32_spi_regspec *regs;

	const struct stm32_spi_regspec *regs;
@@ -253,6 +252,7 @@ struct stm32_spi_cfg { 
	unsigned int baud_rate_div_min;

	unsigned int baud_rate_div_min;

	unsigned int baud_rate_div_max;

	unsigned int baud_rate_div_max;

	bool has_fifo;

	bool has_fifo;

	u16 flags;

};

};





/**

/**
@@ -1722,6 +1722,7 @@ static const struct stm32_spi_cfg stm32f4_spi_cfg = { 
	.baud_rate_div_min = STM32F4_SPI_BR_DIV_MIN,

	.baud_rate_div_min = STM32F4_SPI_BR_DIV_MIN,

	.baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX,

	.baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX,

	.has_fifo = false,

	.has_fifo = false,

	.flags = SPI_MASTER_MUST_TX,

};

};





static const struct stm32_spi_cfg stm32h7_spi_cfg = {

static const struct stm32_spi_cfg stm32h7_spi_cfg = {
@@ -1854,7 +1855,7 @@ static int stm32_spi_probe(struct platform_device *pdev) 
	master->prepare_message = stm32_spi_prepare_msg;

	master->prepare_message = stm32_spi_prepare_msg;

	master->transfer_one = stm32_spi_transfer_one;

	master->transfer_one = stm32_spi_transfer_one;

	master->unprepare_message = stm32_spi_unprepare_msg;

	master->unprepare_message = stm32_spi_unprepare_msg;

	master->flags = SPI_MASTER_MUST_TX;

	master->flags = spi->cfg->flags;





	spi->dma_tx = dma_request_chan(spi->dev, "tx");

	spi->dma_tx = dma_request_chan(spi->dev, "tx");

	if (IS_ERR(spi->dma_tx)) {

	if (IS_ERR(spi->dma_tx)) {