Loading arch/arm/mm/ioremap.c +1 −2 Original line number Diff line number Diff line Loading @@ -130,8 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr, * mapping. See include/asm-arm/proc-armv/pgtable.h for more information. */ void __iomem * __ioremap(unsigned long phys_addr, size_t size, unsigned long flags, unsigned long align) __ioremap(unsigned long phys_addr, size_t size, unsigned long flags) { void * addr; struct vm_struct * area; Loading include/asm-arm/arch-ixp4xx/io.h +3 −6 Original line number Diff line number Diff line Loading @@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * fallback to the default. */ static inline void __iomem * __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align) __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) { extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); if((addr < 0x48000000) || (addr > 0x4fffffff)) return __ioremap(addr, size, flags, align); return __ioremap(addr, size, flags); return (void *)addr; } Loading @@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned static inline void __ixp4xx_iounmap(void __iomem *addr) { extern void __iounmap(void __iomem *addr); if ((u32)addr >= VMALLOC_START) __iounmap(addr); } #define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) #define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f) #define __arch_iounmap(a) __ixp4xx_iounmap(a) #define writeb(v, p) __ixp4xx_writeb(v, p) Loading include/asm-arm/io.h +12 −9 Original line number Diff line number Diff line Loading @@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen); #define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) #define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) /* * Architecture ioremap implementation. */ extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iounmap(void __iomem *addr); /* * Bad read/write accesses... */ Loading Loading @@ -256,18 +262,15 @@ check_signature(void __iomem *io_addr, const unsigned char *signature, * ioremap takes a PCI memory address, as specified in * Documentation/IO-mapping.txt. */ extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); extern void __iounmap(void __iomem *addr); #ifndef __arch_ioremap #define ioremap(cookie,size) __ioremap(cookie,size,0,1) #define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1) #define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1) #define ioremap(cookie,size) __ioremap(cookie,size,0) #define ioremap_nocache(cookie,size) __ioremap(cookie,size,0) #define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE) #define iounmap(cookie) __iounmap(cookie) #else #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1) #define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1) #define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1) #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0) #define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0) #define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE) #define iounmap(cookie) __arch_iounmap(cookie) #endif Loading Loading
arch/arm/mm/ioremap.c +1 −2 Original line number Diff line number Diff line Loading @@ -130,8 +130,7 @@ remap_area_pages(unsigned long start, unsigned long phys_addr, * mapping. See include/asm-arm/proc-armv/pgtable.h for more information. */ void __iomem * __ioremap(unsigned long phys_addr, size_t size, unsigned long flags, unsigned long align) __ioremap(unsigned long phys_addr, size_t size, unsigned long flags) { void * addr; struct vm_struct * area; Loading
include/asm-arm/arch-ixp4xx/io.h +3 −6 Original line number Diff line number Diff line Loading @@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * fallback to the default. */ static inline void __iomem * __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align) __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) { extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); if((addr < 0x48000000) || (addr > 0x4fffffff)) return __ioremap(addr, size, flags, align); return __ioremap(addr, size, flags); return (void *)addr; } Loading @@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned static inline void __ixp4xx_iounmap(void __iomem *addr) { extern void __iounmap(void __iomem *addr); if ((u32)addr >= VMALLOC_START) __iounmap(addr); } #define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) #define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f) #define __arch_iounmap(a) __ixp4xx_iounmap(a) #define writeb(v, p) __ixp4xx_writeb(v, p) Loading
include/asm-arm/io.h +12 −9 Original line number Diff line number Diff line Loading @@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen); #define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) #define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) /* * Architecture ioremap implementation. */ extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iounmap(void __iomem *addr); /* * Bad read/write accesses... */ Loading Loading @@ -256,18 +262,15 @@ check_signature(void __iomem *io_addr, const unsigned char *signature, * ioremap takes a PCI memory address, as specified in * Documentation/IO-mapping.txt. */ extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long); extern void __iounmap(void __iomem *addr); #ifndef __arch_ioremap #define ioremap(cookie,size) __ioremap(cookie,size,0,1) #define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1) #define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1) #define ioremap(cookie,size) __ioremap(cookie,size,0) #define ioremap_nocache(cookie,size) __ioremap(cookie,size,0) #define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE) #define iounmap(cookie) __iounmap(cookie) #else #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1) #define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1) #define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1) #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0) #define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0) #define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE) #define iounmap(cookie) __arch_iounmap(cookie) #endif Loading