Loading drivers/pci/host/pcie-iproc-platform.c +1 −6 Original line number Diff line number Diff line Loading @@ -47,7 +47,6 @@ MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table); static int iproc_pcie_pltfm_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; const struct of_device_id *of_id; struct iproc_pcie *pcie; struct device_node *np = dev->of_node; struct resource reg; Loading @@ -55,16 +54,12 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) LIST_HEAD(res); int ret; of_id = of_match_device(iproc_pcie_of_match_table, dev); if (!of_id) return -EINVAL; pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); if (!pcie) return -ENOMEM; pcie->dev = dev; pcie->type = (enum iproc_pcie_type)of_id->data; pcie->type = (enum iproc_pcie_type) of_device_get_match_data(dev); ret = of_address_to_resource(np, 0, ®); if (ret < 0) { Loading drivers/pci/host/pcie-iproc.c +4 −1 Original line number Diff line number Diff line Loading @@ -1205,7 +1205,7 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) struct device *dev; int ret; void *sysdata; struct pci_bus *bus; struct pci_bus *bus, *child; dev = pcie->dev; Loading Loading @@ -1278,6 +1278,9 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) if (pcie->map_irq) pci_fixup_irqs(pci_common_swizzle, pcie->map_irq); list_for_each_entry(child, &bus->children, node) pcie_bus_configure_settings(child); pci_bus_add_devices(bus); return 0; Loading drivers/pci/quirks.c +21 −0 Original line number Diff line number Diff line Loading @@ -2240,6 +2240,27 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5719, quirk_brcm_5719_limit_mrrs); #ifdef CONFIG_PCIE_IPROC_PLATFORM static void quirk_paxc_bridge(struct pci_dev *pdev) { /* The PCI config space is shared with the PAXC root port and the first * Ethernet device. So, we need to workaround this by telling the PCI * code that the bridge is not an Ethernet device. */ if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE) pdev->class = PCI_CLASS_BRIDGE_PCI << 8; /* MPSS is not being set properly (as it is currently 0). This is * because that area of the PCI config space is hard coded to zero, and * is not modifiable by firmware. Set this to 2 (e.g., 512 byte MPS) * so that the MPS can be set to the real max value. */ pdev->pcie_mpss = 2; } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16cd, quirk_paxc_bridge); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, quirk_paxc_bridge); #endif /* Originally in EDAC sources for i82875P: * Intel tells BIOS developers to hide device 6 which * configures the overflow device access containing Loading Loading
drivers/pci/host/pcie-iproc-platform.c +1 −6 Original line number Diff line number Diff line Loading @@ -47,7 +47,6 @@ MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table); static int iproc_pcie_pltfm_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; const struct of_device_id *of_id; struct iproc_pcie *pcie; struct device_node *np = dev->of_node; struct resource reg; Loading @@ -55,16 +54,12 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) LIST_HEAD(res); int ret; of_id = of_match_device(iproc_pcie_of_match_table, dev); if (!of_id) return -EINVAL; pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); if (!pcie) return -ENOMEM; pcie->dev = dev; pcie->type = (enum iproc_pcie_type)of_id->data; pcie->type = (enum iproc_pcie_type) of_device_get_match_data(dev); ret = of_address_to_resource(np, 0, ®); if (ret < 0) { Loading
drivers/pci/host/pcie-iproc.c +4 −1 Original line number Diff line number Diff line Loading @@ -1205,7 +1205,7 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) struct device *dev; int ret; void *sysdata; struct pci_bus *bus; struct pci_bus *bus, *child; dev = pcie->dev; Loading Loading @@ -1278,6 +1278,9 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) if (pcie->map_irq) pci_fixup_irqs(pci_common_swizzle, pcie->map_irq); list_for_each_entry(child, &bus->children, node) pcie_bus_configure_settings(child); pci_bus_add_devices(bus); return 0; Loading
drivers/pci/quirks.c +21 −0 Original line number Diff line number Diff line Loading @@ -2240,6 +2240,27 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5719, quirk_brcm_5719_limit_mrrs); #ifdef CONFIG_PCIE_IPROC_PLATFORM static void quirk_paxc_bridge(struct pci_dev *pdev) { /* The PCI config space is shared with the PAXC root port and the first * Ethernet device. So, we need to workaround this by telling the PCI * code that the bridge is not an Ethernet device. */ if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE) pdev->class = PCI_CLASS_BRIDGE_PCI << 8; /* MPSS is not being set properly (as it is currently 0). This is * because that area of the PCI config space is hard coded to zero, and * is not modifiable by firmware. Set this to 2 (e.g., 512 byte MPS) * so that the MPS can be set to the real max value. */ pdev->pcie_mpss = 2; } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16cd, quirk_paxc_bridge); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, quirk_paxc_bridge); #endif /* Originally in EDAC sources for i82875P: * Intel tells BIOS developers to hide device 6 which * configures the overflow device access containing Loading