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Commit 685b4d81 authored by Isabel Zhang's avatar Isabel Zhang Committed by Alex Deucher
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drm/amd/display: Force prefetch mode to 0



[Why]
On APU should be always using prefetch mode 0.
Currently, sometimes prefetch mode 1 is being
used causing system to hard hang due to
minTTUVBlank being too low.

[How]
Any ASIC running DCN21 will by default allow
self refresh and mclk switch. This sets both
min and max prefetch mode to 0 by default.

Signed-off-by: default avatarIsabel Zhang <isabel.zhang@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 850d2fcf
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