Commit 6aadbff9 authored by Sakari Ailus's avatar Sakari Ailus Committed by Mauro Carvalho Chehab
Browse files

media: ccs-pll: Remove parallel bus support 



The parallel bus PLL calculation has no users. Remove it.

Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 9c1a0d9e

drivers/media/i2c/ccs-pll.c

+0 −5
Original line number Diff line number Diff line
@@ -435,11 +435,6 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim, 
		op_pll_fr->pll_op_clk_freq_hz = pll->link_freq * 2

			* (pll->csi2.lanes / lane_op_clock_ratio);

		break;

	case CCS_PLL_BUS_TYPE_PARALLEL:

		op_pll_fr->pll_op_clk_freq_hz = pll->link_freq * pll->bits_per_pixel

			/ DIV_ROUND_UP(pll->bits_per_pixel,

				       pll->parallel.bus_width);

		break;

	default:

		return -EINVAL;

	}

drivers/media/i2c/ccs-pll.h

+4 −10
Original line number Diff line number Diff line
@@ -14,7 +14,6 @@ 


/* CSI-2 or CCP-2 */

#define CCS_PLL_BUS_TYPE_CSI2					0x00

#define CCS_PLL_BUS_TYPE_PARALLEL				0x01



/* op pix clock is for all lanes in total normally */

#define CCS_PLL_FLAG_OP_PIX_CLOCK_PER_LANE			(1 << 0)
@@ -37,14 +36,9 @@ struct ccs_pll_branch_bk { 
struct ccs_pll {

	/* input values */

	uint8_t bus_type;

	union {

	struct {

		uint8_t lanes;

	} csi2;

		struct {

			uint8_t bus_width;

		} parallel;

	};

	unsigned long flags;

	uint8_t binning_horizontal;

	uint8_t binning_vertical;