Commit 6b8970bd authored by Miquel Raynal's avatar Miquel Raynal Committed by Gregory CLEMENT
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arm64: dts: marvell: Add support for Marvell CN9130 SoC support 



A CN9130 SoC has one AP807 and one internal CP115.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 96bb4b31

arch/arm64/boot/dts/marvell/cn9130.dtsi

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (C) 2019 Marvell International Ltd.

 *

 * Device tree for the CN9130 SoC.

 */



#include "armada-ap807-quad.dtsi"



/ {

	model = "Marvell Armada CN9130 SoC";

	compatible = "marvell,cn9130", "marvell,armada-ap807-quad",

		     "marvell,armada-ap807";

};



/*

 * Instantiate the internal CP115

 */



#define CP11X_NAME		cp0

#define CP11X_BASE		f2000000

#define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \

						    0xe0000000 + ((iface - 1) * 0x1000000))

#define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000)

#define CP11X_PCIE0_BASE	f2600000

#define CP11X_PCIE1_BASE	f2620000

#define CP11X_PCIE2_BASE	f2640000



#include "armada-cp115.dtsi"



#undef CP11X_NAME

#undef CP11X_BASE

#undef CP11X_PCIEx_MEM_BASE

#undef CP11X_PCIEx_MEM_SIZE

#undef CP11X_PCIE0_BASE

#undef CP11X_PCIE1_BASE

#undef CP11X_PCIE2_BASE