Commit 6c421a9c authored by Christian Marangi's avatar Christian Marangi Committed by Bjorn Andersson
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ARM: dts: qcom: ipq8064: fix and add some missing gsbi node 



Add some tag for gsbi to make them usable for ipq8064 SoC. Add missing
gsbi7 i2c node and gsbi1 node.

Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Tested-by: default avatarJonathan McDowell <noodles@earth.li>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-8-ansuelsmth@gmail.com
parent 8fafb7e5

arch/arm/boot/dts/qcom-ipq8064.dtsi

+53 −1
Original line number Diff line number Diff line
@@ -539,6 +539,44 @@ saw1: regulator@2099000 { 
			regulator;

		};



		gsbi1: gsbi@12440000 {

			compatible = "qcom,gsbi-v1.0.0";

			reg = <0x12440000 0x100>;

			cell-index = <1>;

			clocks = <&gcc GSBI1_H_CLK>;

			clock-names = "iface";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			syscon-tcsr = <&tcsr>;



			status = "disabled";



			gsbi1_serial: serial@12450000 {

				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";

				reg = <0x12450000 0x100>,

				      <0x12400000 0x03>;

				interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;

				clock-names = "core", "iface";



				status = "disabled";

			};



			gsbi1_i2c: i2c@12460000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x12460000 0x1000>;

				interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;

				clock-names = "core", "iface";

				#address-cells = <1>;

				#size-cells = <0>;



				status = "disabled";

			};

		};



		gsbi2: gsbi@12480000 {

			compatible = "qcom,gsbi-v1.0.0";

			cell-index = <2>;
@@ -562,7 +600,7 @@ gsbi2_serial: serial@12490000 { 
				status = "disabled";

			};



			i2c@124a0000 {

			gsbi2_i2c: i2c@124a0000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x124a0000 0x1000>;

				interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
@@ -727,6 +765,20 @@ gsbi7_serial: serial@16640000 { 
				clock-names = "core", "iface";

				status = "disabled";

			};



			gsbi7_i2c: i2c@16680000 {

				compatible = "qcom,i2c-qup-v1.1.1";

				reg = <0x16680000 0x1000>;

				interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;



				clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;

				clock-names = "core", "iface";



				#address-cells = <1>;

				#size-cells = <0>;



				status = "disabled";

			};

		};



		rng@1a500000 {