Commit 6c8e1f3b authored by Leo (Hanghong) Ma's avatar Leo (Hanghong) Ma Committed by Alex Deucher
Browse files

drm/amd/display: Fix static checker warnings on tracebuff_fb 



[Why]
Static analysis on linux-next has found a potential null pointer
dereference;

[How]
Refactor the function, add ASSERT and remove the unnecessary check.

Signed-off-by: default avatarLeo (Hanghong) Ma <hanghong.ma@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 47588233

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

+68 −74
Original line number Diff line number Diff line
@@ -415,6 +415,12 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
	if (!dmub->sw_init)

		return DMUB_STATUS_INVALID;



	if (!inst_fb || !stack_fb || !data_fb || !bios_fb || !mail_fb ||

		!tracebuff_fb || !fw_state_fb || !scratch_mem_fb) {

		ASSERT(0);

		return DMUB_STATUS_INVALID;

	}



	dmub->fb_base = params->fb_base;

	dmub->fb_offset = params->fb_offset;

	dmub->psp_version = params->psp_version;
@@ -422,7 +428,6 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
	if (dmub->hw_funcs.reset)

		dmub->hw_funcs.reset(dmub);



	if (inst_fb && data_fb) {

	cw0.offset.quad_part = inst_fb->gpu_addr;

	cw0.region.base = DMUB_CW0_BASE;

	cw0.region.top = cw0.region.base + inst_fb->size - 1;
@@ -441,10 +446,6 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
		dmub->hw_funcs.backdoor_load(dmub, &cw0, &cw1);

	}



	}



	if (inst_fb && data_fb && bios_fb && mail_fb && tracebuff_fb &&

	    fw_state_fb && scratch_mem_fb) {

	cw2.offset.quad_part = data_fb->gpu_addr;

	cw2.region.base = DMUB_CW0_BASE + inst_fb->size;

	cw2.region.top = cw2.region.base + data_fb->size;
@@ -476,7 +477,6 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
	outbox0.base = DMUB_REGION5_BASE + TRACE_BUFFER_ENTRY_OFFSET;

	outbox0.top = outbox0.base + tracebuff_fb->size - TRACE_BUFFER_ENTRY_OFFSET;





	cw6.offset.quad_part = fw_state_fb->gpu_addr;

	cw6.region.base = DMUB_CW6_BASE;

	cw6.region.top = cw6.region.base + fw_state_fb->size;
@@ -486,8 +486,7 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
	dmub->scratch_mem_fb = *scratch_mem_fb;



	if (dmub->hw_funcs.setup_windows)

			dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4,

						     &cw5, &cw6);

		dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4, &cw5, &cw6);



	if (dmub->hw_funcs.setup_outbox0)

		dmub->hw_funcs.setup_outbox0(dmub, &outbox0);
@@ -496,14 +495,11 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
		dmub->hw_funcs.setup_mailbox(dmub, &inbox1);

	if (dmub->hw_funcs.setup_out_mailbox)

		dmub->hw_funcs.setup_out_mailbox(dmub, &outbox1);

	}



	if (mail_fb) {

	dmub_memset(&rb_params, 0, sizeof(rb_params));

	rb_params.ctx = dmub;

	rb_params.base_address = mail_fb->cpu_addr;

	rb_params.capacity = DMUB_RB_SIZE;



	dmub_rb_init(&dmub->inbox1_rb, &rb_params);



	// Initialize outbox1 ring buffer
@@ -512,8 +508,6 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 
	rb_params.capacity = DMUB_RB_SIZE;

	dmub_rb_init(&dmub->outbox1_rb, &rb_params);



	}



	dmub_memset(&outbox0_rb_params, 0, sizeof(outbox0_rb_params));

	outbox0_rb_params.ctx = dmub;

	outbox0_rb_params.base_address = (void *)((uint64_t)(tracebuff_fb->cpu_addr) + TRACE_BUFFER_ENTRY_OFFSET);