Commit 6fb65a66 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

[media] drxk: add support for Mpeg output clock drive strength config 



Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 6e5caf84

drivers/media/dvb/dvb-usb/az6007.c

+1 −2
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ static struct drxk_config terratec_h7_drxk = { 
	.single_master = true,

	.no_i2c_bridge = false,

	.chunk_size = 64,

	.mpeg_out_clk_strength = 0x02,

	.microcode_name = "dvb-usb-terratec-h7-az6007.fw",

};
@@ -278,12 +279,10 @@ static int az6007_led_on_off(struct usb_interface *intf, int onoff) 
{

	struct usb_device *udev = interface_to_usbdev(intf);

	int ret;



	/* TS through */

	ret = az6007_write(udev, AZ6007_POWER, onoff, 0, NULL, 0);

	if (ret < 0)

		err("%s failed with error %d", __func__, ret);



	return ret;

}

drivers/media/dvb/frontends/drxk.h

+3 −1
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
 * @antenna_gpio:	GPIO bit used to control the antenna

 * @antenna_dvbt:	GPIO bit for changing antenna to DVB-C. A value of 1

 *			means that 1=DVBC, 0 = DVBT. Zero means the opposite.

 * @mpeg_out_clk_strength: DRXK Mpeg output clock drive strength.

 * @microcode_name:	Name of the firmware file with the microcode

 *

 * On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is
@@ -32,6 +33,7 @@ struct drxk_config { 
	bool	antenna_dvbt;

	u16	antenna_gpio;



	u8	mpeg_out_clk_strength;

	int	chunk_size;



	const char *microcode_name;

drivers/media/dvb/frontends/drxk_hard.c

+6 −6
Original line number Diff line number Diff line
@@ -91,10 +91,6 @@ bool IsA1WithRomCode(struct drxk_state *state) 
#define DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH (0x03)

#endif



#ifndef DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH

#define DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH (0x06)

#endif



#define DEFAULT_DRXK_MPEG_LOCK_TIMEOUT 700

#define DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT 500
@@ -659,7 +655,6 @@ static int init_state(struct drxk_state *state) 
	u32 ulGPIOCfg = 0x0113;

	u32 ulInvertTSClock = 0;

	u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH;

	u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH;

	u32 ulDVBTBitrate = 50000000;

	u32 ulDVBCBitrate = DRXK_QAM_SYMBOLRATE_MAX * 8;
@@ -820,7 +815,6 @@ static int init_state(struct drxk_state *state) 
	state->m_DVBCBitrate = ulDVBCBitrate;



	state->m_TSDataStrength = (ulTSDataStrength & 0x07);

	state->m_TSClockkStrength = (ulTSClockkStrength & 0x07);



	/* Maximum bitrate in b/s in case static clockrate is selected */

	state->m_mpegTsStaticBitrate = 19392658;
@@ -6394,6 +6388,12 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config, 
		state->m_DVBCStaticCLK = 1;

	}





	if (config->mpeg_out_clk_strength)

		state->m_TSClockkStrength = config->mpeg_out_clk_strength & 0x07;

	else

		state->m_TSClockkStrength = 0x06;



	if (config->parallel_ts)

		state->m_enableParallel = true;

	else