Commit 706737d2 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman
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staging: mt7621-dts: use 'interrupt-map' and 'interrupt-map-mask' 



Custom function for 'map_irq' was introduced in
commit fab6710e ("staging: mt7621-pci: fix PCIe interrupt mapping")

This is not really necessary and code has been fixed to avoid
custom configuration of the virtual bridges and make possible
to properly map the root ports interrupts using this standard
properties. Hence properly update device tree accordly.

Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210505121736.6459-10-sergio.paracuellos@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 7fa708e0

drivers/staging/mt7621-dts/mt7621.dtsi

+14 −4
Original line number Diff line number Diff line
@@ -502,10 +502,11 @@ pcie: pcie@1e140000 { 
			0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */

		>;



		interrupt-parent = <&gic>;

		interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH

				GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH

				GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xF800 0 0 0>;

		interrupt-map = <0x0000 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,

				<0x0800 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,

				<0x1000 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;



		status = "disabled";
@@ -524,6 +525,9 @@ pcie@0,0 { 
			reg = <0x0000 0 0 0 0>;

			#address-cells = <3>;

			#size-cells = <2>;

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>;

			ranges;

			bus-range = <0x00 0xff>;

		};
@@ -532,6 +536,9 @@ pcie@1,0 { 
			reg = <0x0800 0 0 0 0>;

			#address-cells = <3>;

			#size-cells = <2>;

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>;

			ranges;

			bus-range = <0x00 0xff>;

		};
@@ -540,6 +547,9 @@ pcie@2,0 { 
			reg = <0x1000 0 0 0 0>;

			#address-cells = <3>;

			#size-cells = <2>;

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0>;

			interrupt-map = <0 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;

			ranges;

			bus-range = <0x00 0xff>;

		};