Commit 7178d2a6 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon/dpm: save some display parameters for DPM 



Required for SI.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a5cb318e

drivers/gpu/drm/radeon/evergreen.c

+4 −0
Original line number Diff line number Diff line
@@ -2267,6 +2267,10 @@ static void evergreen_program_watermarks(struct radeon_device *rdev, 
	WREG32(PRIORITY_A_CNT + radeon_crtc->crtc_offset, priority_a_cnt);

	WREG32(PRIORITY_B_CNT + radeon_crtc->crtc_offset, priority_b_cnt);



	/* save values for DPM */

	radeon_crtc->line_time = line_time;

	radeon_crtc->wm_high = latency_watermark_a;

	radeon_crtc->wm_low = latency_watermark_b;

}



/**

drivers/gpu/drm/radeon/radeon_mode.h

+4 −0
Original line number Diff line number Diff line
@@ -331,6 +331,10 @@ struct radeon_crtc { 
	u32 pll_flags;

	struct drm_encoder *encoder;

	struct drm_connector *connector;

	/* for dpm */

	u32 line_time;

	u32 wm_low;

	u32 wm_high;

};



struct radeon_encoder_primary_dac {

drivers/gpu/drm/radeon/si.c

+4 −0
Original line number Diff line number Diff line
@@ -2166,6 +2166,10 @@ static void dce6_program_watermarks(struct radeon_device *rdev, 
	WREG32(PRIORITY_A_CNT + radeon_crtc->crtc_offset, priority_a_cnt);

	WREG32(PRIORITY_B_CNT + radeon_crtc->crtc_offset, priority_b_cnt);



	/* save values for DPM */

	radeon_crtc->line_time = line_time;

	radeon_crtc->wm_high = latency_watermark_a;

	radeon_crtc->wm_low = latency_watermark_b;

}



void dce6_bandwidth_update(struct radeon_device *rdev)