Commit 71f5e7b3 authored by Aidan MacDonald's avatar Aidan MacDonald Committed by Linus Walleij
Browse files

pinctrl: ingenic: Convert to immutable irq chip 



Update the driver to use an immutable IRQ chip to fix this warning:

    "not an immutable chip, please consider fixing it!"

Preserve per-chip labels by adding an ->irq_print_chip() callback.

Acked-by: default avatarMarc Zyngier <maz@kernel.org>
Reviewed-by: default avatarPaul Cercueil <paul@crapouillou.net>
Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: default avatarAidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220622185010.2022515-3-aidanmacdonald.0x0@gmail.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 4c76a7fc

drivers/pinctrl/pinctrl-ingenic.c

+27 −14
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include <linux/pinctrl/pinconf-generic.h>

#include <linux/platform_device.h>

#include <linux/regmap.h>

#include <linux/seq_file.h>

#include <linux/slab.h>



#include "core.h"
@@ -135,7 +136,6 @@ struct ingenic_pinctrl { 
struct ingenic_gpio_chip {

	struct ingenic_pinctrl *jzpc;

	struct gpio_chip gc;

	struct irq_chip irq_chip;

	unsigned int irq, reg_base;

};
@@ -3419,6 +3419,8 @@ static void ingenic_gpio_irq_enable(struct irq_data *irqd) 
	struct ingenic_gpio_chip *jzgc = gpiochip_get_data(gc);

	irq_hw_number_t irq = irqd_to_hwirq(irqd);



	gpiochip_enable_irq(gc, irq);



	if (is_soc_or_above(jzgc->jzpc, ID_JZ4770))

		ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);

	else if (is_soc_or_above(jzgc->jzpc, ID_JZ4740))
@@ -3443,6 +3445,8 @@ static void ingenic_gpio_irq_disable(struct irq_data *irqd) 
		ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false);

	else

		ingenic_gpio_set_bit(jzgc, JZ4730_GPIO_GPIER, irq, false);



	gpiochip_disable_irq(gc, irq);

}



static void ingenic_gpio_irq_ack(struct irq_data *irqd)
@@ -3687,6 +3691,27 @@ static void ingenic_gpio_irq_release(struct irq_data *data) 
	return gpiochip_relres_irq(gpio_chip, irq);

}



static void ingenic_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)

{

	struct gpio_chip *gpio_chip = irq_data_get_irq_chip_data(data);



	seq_printf(p, "%s", gpio_chip->label);

}



static const struct irq_chip ingenic_gpio_irqchip = {

	.irq_enable		= ingenic_gpio_irq_enable,

	.irq_disable		= ingenic_gpio_irq_disable,

	.irq_unmask		= ingenic_gpio_irq_unmask,

	.irq_mask		= ingenic_gpio_irq_mask,

	.irq_ack		= ingenic_gpio_irq_ack,

	.irq_set_type		= ingenic_gpio_irq_set_type,

	.irq_set_wake		= ingenic_gpio_irq_set_wake,

	.irq_request_resources	= ingenic_gpio_irq_request,

	.irq_release_resources	= ingenic_gpio_irq_release,

	.irq_print_chip		= ingenic_gpio_irq_print_chip,

	.flags			= IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,

};



static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,

		int pin, int func)

{
@@ -4175,20 +4200,8 @@ static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc, 
	if (!jzgc->irq)

		return -EINVAL;



	jzgc->irq_chip.name = jzgc->gc.label;

	jzgc->irq_chip.irq_enable = ingenic_gpio_irq_enable;

	jzgc->irq_chip.irq_disable = ingenic_gpio_irq_disable;

	jzgc->irq_chip.irq_unmask = ingenic_gpio_irq_unmask;

	jzgc->irq_chip.irq_mask = ingenic_gpio_irq_mask;

	jzgc->irq_chip.irq_ack = ingenic_gpio_irq_ack;

	jzgc->irq_chip.irq_set_type = ingenic_gpio_irq_set_type;

	jzgc->irq_chip.irq_set_wake = ingenic_gpio_irq_set_wake;

	jzgc->irq_chip.irq_request_resources = ingenic_gpio_irq_request;

	jzgc->irq_chip.irq_release_resources = ingenic_gpio_irq_release;

	jzgc->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND;



	girq = &jzgc->gc.irq;

	girq->chip = &jzgc->irq_chip;

	gpio_irq_chip_set_chip(girq, &ingenic_gpio_irqchip);

	girq->parent_handler = ingenic_gpio_irq_handler;

	girq->num_parents = 1;

	girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),