Loading drivers/gpu/drm/nouveau/nouveau_drv.h +1 −0 Original line number Diff line number Diff line Loading @@ -1028,6 +1028,7 @@ extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); extern void nv50_instmem_flush(struct drm_device *); extern void nv84_instmem_flush(struct drm_device *); extern void nv50_vm_flush(struct drm_device *, int engine); /* nv04_mc.c */ Loading drivers/gpu/drm/nouveau/nouveau_state.c +4 −1 Original line number Diff line number Diff line Loading @@ -266,7 +266,10 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) engine->instmem.clear = nv50_instmem_clear; engine->instmem.bind = nv50_instmem_bind; engine->instmem.unbind = nv50_instmem_unbind; if (dev_priv->chipset == 0x50) engine->instmem.flush = nv50_instmem_flush; else engine->instmem.flush = nv84_instmem_flush; engine->mc.init = nv50_mc_init; engine->mc.takedown = nv50_mc_takedown; engine->timer.init = nv04_timer_init; Loading drivers/gpu/drm/nouveau/nv50_instmem.c +8 −0 Original line number Diff line number Diff line Loading @@ -485,6 +485,14 @@ nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) void nv50_instmem_flush(struct drm_device *dev) { nv_wr32(dev, 0x00330c, 0x00000001); if (!nv_wait(0x00330c, 0x00000001, 0x00000000)) NV_ERROR(dev, "PRAMIN flush timeout\n"); } void nv84_instmem_flush(struct drm_device *dev) { nv_wr32(dev, 0x070000, 0x00000001); if (!nv_wait(0x070000, 0x00000001, 0x00000000)) Loading Loading
drivers/gpu/drm/nouveau/nouveau_drv.h +1 −0 Original line number Diff line number Diff line Loading @@ -1028,6 +1028,7 @@ extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *); extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *); extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *); extern void nv50_instmem_flush(struct drm_device *); extern void nv84_instmem_flush(struct drm_device *); extern void nv50_vm_flush(struct drm_device *, int engine); /* nv04_mc.c */ Loading
drivers/gpu/drm/nouveau/nouveau_state.c +4 −1 Original line number Diff line number Diff line Loading @@ -266,7 +266,10 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) engine->instmem.clear = nv50_instmem_clear; engine->instmem.bind = nv50_instmem_bind; engine->instmem.unbind = nv50_instmem_unbind; if (dev_priv->chipset == 0x50) engine->instmem.flush = nv50_instmem_flush; else engine->instmem.flush = nv84_instmem_flush; engine->mc.init = nv50_mc_init; engine->mc.takedown = nv50_mc_takedown; engine->timer.init = nv04_timer_init; Loading
drivers/gpu/drm/nouveau/nv50_instmem.c +8 −0 Original line number Diff line number Diff line Loading @@ -485,6 +485,14 @@ nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj) void nv50_instmem_flush(struct drm_device *dev) { nv_wr32(dev, 0x00330c, 0x00000001); if (!nv_wait(0x00330c, 0x00000001, 0x00000000)) NV_ERROR(dev, "PRAMIN flush timeout\n"); } void nv84_instmem_flush(struct drm_device *dev) { nv_wr32(dev, 0x070000, 0x00000001); if (!nv_wait(0x070000, 0x00000001, 0x00000000)) Loading