Commit 7389c751 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Keep SDMAv4.4.2 active during reset 



During ASIC wide reset, SDMA shouldn't be clockgated and be ready to
accept freeze requests from PMFW. For that, don't stop SDMA engine
during reset and keep the clocks active.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b2ef2fdf

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

+8 −0
Original line number Diff line number Diff line
@@ -566,6 +566,11 @@ static void sdma_v4_4_2_inst_enable(struct amdgpu_device *adev, bool enable, 
		sdma_v4_4_2_inst_rlc_stop(adev, inst_mask);

		if (adev->sdma.has_page_queue)

			sdma_v4_4_2_inst_page_stop(adev, inst_mask);



		/* SDMA FW needs to respond to FREEZE requests during reset.

		 * Keep it running during reset */

		if (!amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))

			return;

	}



	for_each_inst(i, inst_mask) {
@@ -1435,6 +1440,9 @@ static int sdma_v4_4_2_suspend(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	if (amdgpu_in_reset(adev))

		sdma_v4_4_2_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);



	return sdma_v4_4_2_hw_fini(adev);

}