Commit 73ec9440 authored by Srinivas Goud's avatar Srinivas Goud Committed by Wim Van Sebroeck
Browse files

watchdog: of_xilinx_wdt: Used BIT macro 



Used BIT macro instead of mask value.

Signed-off-by: default avatarSrinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarSrinivas Neeli <srinivas.neeli@xilinx.com>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20210329161939.37680-3-srinivas.neeli@xilinx.com


Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@linux-watchdog.org>
parent b2802e78

drivers/watchdog/of_xilinx_wdt.c

+5 −4
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 
 * (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)

 */



#include <linux/bits.h>

#include <linux/clk.h>

#include <linux/err.h>

#include <linux/module.h>
@@ -24,12 +25,12 @@ 
#define XWT_TBR_OFFSET      0x8 /* Timebase Register Offset */



/* Control/Status Register Masks  */

#define XWT_CSR0_WRS_MASK   0x00000008 /* Reset status */

#define XWT_CSR0_WDS_MASK   0x00000004 /* Timer state  */

#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */

#define XWT_CSR0_WRS_MASK	BIT(3) /* Reset status */

#define XWT_CSR0_WDS_MASK	BIT(2) /* Timer state  */

#define XWT_CSR0_EWDT1_MASK	BIT(1) /* Enable bit 1 */



/* Control/Status Register 0/1 bits  */

#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */

#define XWT_CSRX_EWDT2_MASK	BIT(0) /* Enable bit 2 */



/* SelfTest constants */

#define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000