Commit 749831ac authored by Mohammad Zafar Ziya's avatar Mohammad Zafar Ziya Committed by Alex Deucher
Browse files

drm/amdgpu/jpeg: Add jpeg ras error query support 



RAS error query support addition for JPEG 2.6

V2: removed unused options and corrected comment format.
Moved register definition to header file.

V3: poison query status check added.
Removed the error query support

V4: Return statement refactored.

Signed-off-by: default avatarMohammad Zafar Ziya <Mohammadzafar.ziya@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c543dcbe

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c

+74 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include "soc15.h"

#include "soc15d.h"

#include "jpeg_v2_0.h"

#include "jpeg_v2_5.h"



#include "vcn/vcn_2_5_offset.h"

#include "vcn/vcn_2_5_sh_mask.h"
@@ -39,6 +40,7 @@ static void jpeg_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev); 
static void jpeg_v2_5_set_irq_funcs(struct amdgpu_device *adev);

static int jpeg_v2_5_set_powergating_state(void *handle,

				enum amd_powergating_state state);

static void jpeg_v2_5_set_ras_funcs(struct amdgpu_device *adev);



static int amdgpu_ih_clientid_jpeg[] = {

	SOC15_IH_CLIENTID_VCN,
@@ -70,6 +72,7 @@ static int jpeg_v2_5_early_init(void *handle) 


	jpeg_v2_5_set_dec_ring_funcs(adev);

	jpeg_v2_5_set_irq_funcs(adev);

	jpeg_v2_5_set_ras_funcs(adev);



	return 0;

}
@@ -730,3 +733,74 @@ const struct amdgpu_ip_block_version jpeg_v2_6_ip_block = 
		.rev = 0,

		.funcs = &jpeg_v2_6_ip_funcs,

};



static uint32_t jpeg_v2_6_query_poison_by_instance(struct amdgpu_device *adev,

		uint32_t instance, uint32_t sub_block)

{

	uint32_t poison_stat = 0, reg_value = 0;



	switch (sub_block) {

	case AMDGPU_JPEG_V2_6_JPEG0:

		reg_value = RREG32_SOC15(JPEG, instance, mmUVD_RAS_JPEG0_STATUS);

		poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG0_STATUS, POISONED_PF);

		break;

	case AMDGPU_JPEG_V2_6_JPEG1:

		reg_value = RREG32_SOC15(JPEG, instance, mmUVD_RAS_JPEG1_STATUS);

		poison_stat = REG_GET_FIELD(reg_value, UVD_RAS_JPEG1_STATUS, POISONED_PF);

		break;

	default:

		break;

	}



	if (poison_stat)

		dev_info(adev->dev, "Poison detected in JPEG%d sub_block%d\n",

			instance, sub_block);



	return poison_stat;

}



static bool jpeg_v2_6_query_ras_poison_status(struct amdgpu_device *adev)

{

	uint32_t inst = 0, sub = 0, poison_stat = 0;



	for (inst = 0; inst < adev->jpeg.num_jpeg_inst; inst++)

		for (sub = 0; sub < AMDGPU_JPEG_V2_6_MAX_SUB_BLOCK; sub++)

			poison_stat +=

			jpeg_v2_6_query_poison_by_instance(adev, inst, sub);



	return !!poison_stat;

}



const struct amdgpu_ras_block_hw_ops jpeg_v2_6_ras_hw_ops = {

	.query_poison_status = jpeg_v2_6_query_ras_poison_status,

};



static struct amdgpu_jpeg_ras jpeg_v2_6_ras = {

	.ras_block = {

		.hw_ops = &jpeg_v2_6_ras_hw_ops,

	},

};



static void jpeg_v2_5_set_ras_funcs(struct amdgpu_device *adev)

{

	switch (adev->ip_versions[JPEG_HWIP][0]) {

	case IP_VERSION(2, 6, 0):

		adev->jpeg.ras = &jpeg_v2_6_ras;

		break;

	default:

		break;

	}



	if (adev->jpeg.ras) {

		amdgpu_ras_register_ras_block(adev, &adev->jpeg.ras->ras_block);



		strcpy(adev->jpeg.ras->ras_block.ras_comm.name, "jpeg");

		adev->jpeg.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG;

		adev->jpeg.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON;

		adev->jpeg.ras_if = &adev->jpeg.ras->ras_block.ras_comm;



		/* If don't define special ras_late_init function, use default ras_late_init */

		if (!adev->jpeg.ras->ras_block.ras_late_init)

			adev->jpeg.ras->ras_block.ras_late_init = amdgpu_ras_block_late_init;

	}

}

drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.h

+7 −0
Original line number Diff line number Diff line
@@ -24,6 +24,13 @@ 
#ifndef __JPEG_V2_5_H__

#define __JPEG_V2_5_H__



enum amdgpu_jpeg_v2_6_sub_block {

	AMDGPU_JPEG_V2_6_JPEG0 = 0,

	AMDGPU_JPEG_V2_6_JPEG1,



	AMDGPU_JPEG_V2_6_MAX_SUB_BLOCK,

};



extern const struct amdgpu_ip_block_version jpeg_v2_5_ip_block;

extern const struct amdgpu_ip_block_version jpeg_v2_6_ip_block;