Commit 74c7b459 authored by Li Yang's avatar Li Yang Committed by Shawn Guo
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ARM: dts: ls1021a: update pcie nodes for dt-schema check



Break up long values to pass dt-schema checks.

Signed-off-by: default avatarLi Yang <leoyang.li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 7cd2f9a5
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+8 −8
Original line number Diff line number Diff line
@@ -839,8 +839,8 @@ usb3: usb@3100000 {

		pcie@3400000 {
			compatible = "fsl,ls1021a-pcie";
			reg = <0x00 0x03400000 0x0 0x00010000   /* controller registers */
			       0x40 0x00000000 0x0 0x00002000>; /* configuration space */
			reg = <0x00 0x03400000 0x0 0x00010000>, /* controller registers */
			      <0x40 0x00000000 0x0 0x00002000>; /* configuration space */
			reg-names = "regs", "config";
			interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
			fsl,pcie-scfg = <&scfg 0>;
@@ -849,8 +849,8 @@ pcie@3400000 {
			device_type = "pci";
			num-viewport = <6>;
			bus-range = <0x0 0xff>;
			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000>, /* downstream I/O */
				 <0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
			msi-parent = <&msi1>, <&msi2>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 7>;
@@ -863,8 +863,8 @@ pcie@3400000 {

		pcie@3500000 {
			compatible = "fsl,ls1021a-pcie";
			reg = <0x00 0x03500000 0x0 0x00010000   /* controller registers */
			       0x48 0x00000000 0x0 0x00002000>; /* configuration space */
			reg = <0x00 0x03500000 0x0 0x00010000>, /* controller registers */
			      <0x48 0x00000000 0x0 0x00002000>; /* configuration space */
			reg-names = "regs", "config";
			interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
			fsl,pcie-scfg = <&scfg 1>;
@@ -873,8 +873,8 @@ pcie@3500000 {
			device_type = "pci";
			num-viewport = <6>;
			bus-range = <0x0 0xff>;
			ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
				  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
			ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000>, /* downstream I/O */
				 <0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
			msi-parent = <&msi1>, <&msi2>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 7>;