Commit 78f71860 authored by Michael Riesch's avatar Michael Riesch Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: rename and sort the rk356x usb2 phy handles 



All nodes and handles related to USB have the prefix usb or usb2,
whereas the phy handles are prefixed with u2phy. Rename for
consistency reasons and to facilitate sorting.

This patch also updates the handles in the only board file that
uses them (rk3566-quartz64-a.dts).

Signed-off-by: default avatarMichael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220127190456.2195527-1-michael.riesch@wolfvision.net


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent ad14de06

arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts

+9 −9
Original line number Diff line number Diff line
@@ -653,32 +653,32 @@ &uart2 { 
	status = "okay";

};



&u2phy1_host {

	phy-supply = <&vcc5v0_usb20_host>;

&usb_host0_ehci {

	status = "okay";

};



&u2phy1_otg {

	phy-supply = <&vcc5v0_usb20_host>;

&usb_host0_ohci {

	status = "okay";

};



&u2phy1 {

&usb_host1_ehci {

	status = "okay";

};



&usb_host0_ehci {

&usb_host1_ohci {

	status = "okay";

};



&usb_host0_ohci {

&usb2phy1 {

	status = "okay";

};



&usb_host1_ehci {

&usb2phy1_host {

	phy-supply = <&vcc5v0_usb20_host>;

	status = "okay";

};



&usb_host1_ohci {

&usb2phy1_otg {

	phy-supply = <&vcc5v0_usb20_host>;

	status = "okay";

};

arch/arm64/boot/dts/rockchip/rk356x.dtsi

+10 −10
Original line number Diff line number Diff line
@@ -214,7 +214,7 @@ usb_host0_ehci: usb@fd800000 { 
		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,

			 <&cru PCLK_USB>;

		phys = <&u2phy1_otg>;

		phys = <&usb2phy1_otg>;

		phy-names = "usb";

		status = "disabled";

	};
@@ -225,7 +225,7 @@ usb_host0_ohci: usb@fd840000 { 
		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,

			 <&cru PCLK_USB>;

		phys = <&u2phy1_otg>;

		phys = <&usb2phy1_otg>;

		phy-names = "usb";

		status = "disabled";

	};
@@ -236,7 +236,7 @@ usb_host1_ehci: usb@fd880000 { 
		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,

			 <&cru PCLK_USB>;

		phys = <&u2phy1_host>;

		phys = <&usb2phy1_host>;

		phy-names = "usb";

		status = "disabled";

	};
@@ -247,7 +247,7 @@ usb_host1_ohci: usb@fd8c0000 { 
		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,

			 <&cru PCLK_USB>;

		phys = <&u2phy1_host>;

		phys = <&usb2phy1_host>;

		phy-names = "usb";

		status = "disabled";

	};
@@ -1211,7 +1211,7 @@ pwm15: pwm@fe700030 { 
		status = "disabled";

	};



	u2phy0: usb2phy@fe8a0000 {

	usb2phy0: usb2phy@fe8a0000 {

		compatible = "rockchip,rk3568-usb2phy";

		reg = <0x0 0xfe8a0000 0x0 0x10000>;

		clocks = <&pmucru CLK_USBPHY0_REF>;
@@ -1222,18 +1222,18 @@ u2phy0: usb2phy@fe8a0000 { 
		#clock-cells = <0>;

		status = "disabled";



		u2phy0_host: host-port {

		usb2phy0_host: host-port {

			#phy-cells = <0>;

			status = "disabled";

		};



		u2phy0_otg: otg-port {

		usb2phy0_otg: otg-port {

			#phy-cells = <0>;

			status = "disabled";

		};

	};



	u2phy1: usb2phy@fe8b0000 {

	usb2phy1: usb2phy@fe8b0000 {

		compatible = "rockchip,rk3568-usb2phy";

		reg = <0x0 0xfe8b0000 0x0 0x10000>;

		clocks = <&pmucru CLK_USBPHY1_REF>;
@@ -1244,12 +1244,12 @@ u2phy1: usb2phy@fe8b0000 { 
		#clock-cells = <0>;

		status = "disabled";



		u2phy1_host: host-port {

		usb2phy1_host: host-port {

			#phy-cells = <0>;

			status = "disabled";

		};



		u2phy1_otg: otg-port {

		usb2phy1_otg: otg-port {

			#phy-cells = <0>;

			status = "disabled";

		};