Loading drivers/gpu/drm/radeon/r100.c +1 −1 Original line number Diff line number Diff line Loading @@ -2974,7 +2974,7 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) for (i = 0; i < track->num_cb; i++) { if (track->cb[i].robj == NULL) { if (!(track->fastfill || track->color_channel_mask || if (!(track->zb_cb_clear || track->color_channel_mask || track->blend_read_enable)) { continue; } Loading drivers/gpu/drm/radeon/r100_track.h +1 −1 Original line number Diff line number Diff line Loading @@ -75,7 +75,7 @@ struct r100_cs_track { struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE]; bool z_enabled; bool separate_cube; bool fastfill; bool zb_cb_clear; bool blend_read_enable; }; Loading drivers/gpu/drm/radeon/r300.c +1 −1 Original line number Diff line number Diff line Loading @@ -1043,7 +1043,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, break; case 0x4d1c: /* ZB_BW_CNTL */ track->fastfill = !!(idx_value & (1 << 2)); track->zb_cb_clear = !!(idx_value & (1 << 5)); break; case 0x4e04: /* RB3D_BLENDCNTL */ Loading Loading
drivers/gpu/drm/radeon/r100.c +1 −1 Original line number Diff line number Diff line Loading @@ -2974,7 +2974,7 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) for (i = 0; i < track->num_cb; i++) { if (track->cb[i].robj == NULL) { if (!(track->fastfill || track->color_channel_mask || if (!(track->zb_cb_clear || track->color_channel_mask || track->blend_read_enable)) { continue; } Loading
drivers/gpu/drm/radeon/r100_track.h +1 −1 Original line number Diff line number Diff line Loading @@ -75,7 +75,7 @@ struct r100_cs_track { struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE]; bool z_enabled; bool separate_cube; bool fastfill; bool zb_cb_clear; bool blend_read_enable; }; Loading
drivers/gpu/drm/radeon/r300.c +1 −1 Original line number Diff line number Diff line Loading @@ -1043,7 +1043,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, break; case 0x4d1c: /* ZB_BW_CNTL */ track->fastfill = !!(idx_value & (1 << 2)); track->zb_cb_clear = !!(idx_value & (1 << 5)); break; case 0x4e04: /* RB3D_BLENDCNTL */ Loading