Commit 7a8655e1 authored by Amit Daniel Kachhap's avatar Amit Daniel Kachhap Committed by Stephen Boyd
Browse files

clk: scmi: Fix the rounding of clock rate 



This fix rounds the clock rate properly by using quotient and not
remainder in the calculation. This issue was found while testing HDMI
in the Juno platform.

Fixes: 6d6a1d82 ("clk: add support for clocks provided by SCMI")
Acked-by: default avatarSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: default avatarAmit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent ce397d21

drivers/clk/clk-scmi.c

+2 −3
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@ static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw, 
static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate,

				unsigned long *parent_rate)

{

	int step;

	u64 fmin, fmax, ftmp;

	struct scmi_clk *clk = to_scmi_clk(hw);
@@ -60,9 +59,9 @@ static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate, 


	ftmp = rate - fmin;

	ftmp += clk->info->range.step_size - 1; /* to round up */

	step = do_div(ftmp, clk->info->range.step_size);

	do_div(ftmp, clk->info->range.step_size);



	return step * clk->info->range.step_size + fmin;

	return ftmp * clk->info->range.step_size + fmin;

}



static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate,