Commit 7aa8a266 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
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drm/amdgpu: Fix GRBM programming sequence



It needs to be done only for XCC instances in non-AID0. Use the physical
instance to determine non-AID0 XCC instances.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarLe Ma <Le.Ma@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f8b34a05
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+6 −3
Original line number Diff line number Diff line
@@ -186,11 +186,14 @@ static void gfx_v9_4_3_set_kiq_pm4_funcs(struct amdgpu_device *adev)

static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev)
{
	int i, num_xcc;
	int i, num_xcc, dev_inst;

	num_xcc = NUM_XCC(adev->gfx.xcc_mask);
	for (i = 2; i < num_xcc; i++)
		WREG32_SOC15(GC, GET_INST(GC, i), regGRBM_MCM_ADDR, 0x4);
	for (i = 0; i < num_xcc; i++) {
		dev_inst = GET_INST(GC, i);
		if (dev_inst >= 2)
			WREG32_SOC15(GC, dev_inst, regGRBM_MCM_ADDR, 0x4);
	}
}

static void gfx_v9_4_3_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel,