Commit 7bec08e3 authored by David S. Miller's avatar David S. Miller Committed by David S. Miller
Browse files

[SPARC64]: Correctable ECC errors cannot occur at trap level > 0. 



The are distrupting, which by the sparc v9 definition means they
can only occur when interrupts are enabled in the %pstate register.
This never occurs in any of the trap handling code running at
trap levels > 0.

So just mark it as an unexpected trap.

This allows us to kill off the cee_stuff member of struct thread_info.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 517af332

arch/sparc64/kernel/traps.c

+0 −1
Original line number Diff line number Diff line
@@ -2169,7 +2169,6 @@ void __init trap_init(void) 
	    TI_KERN_CNTD0 != offsetof(struct thread_info, kernel_cntd0) ||

	    TI_KERN_CNTD1 != offsetof(struct thread_info, kernel_cntd1) ||

	    TI_PCR != offsetof(struct thread_info, pcr_reg) ||

	    TI_CEE_STUFF != offsetof(struct thread_info, cee_stuff) ||

	    TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) ||

	    TI_NEW_CHILD != offsetof(struct thread_info, new_child) ||

	    TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) ||

arch/sparc64/kernel/ttable.S

+1 −17
Original line number Diff line number Diff line
@@ -222,23 +222,7 @@ tl1_resv05c: BTRAPTL1(0x5c) BTRAPTL1(0x5d) BTRAPTL1(0x5e) BTRAPTL1(0x5f) 
tl1_ivec:	TRAP_IVEC

tl1_paw:	TRAPTL1(do_paw_tl1)

tl1_vaw:	TRAPTL1(do_vaw_tl1)



		/* The grotty trick to save %g1 into current->thread.cee_stuff

		 * is because when we take this trap we could be interrupting

		 * trap code already using the trap alternate global registers.

		 *

		 * We cross our fingers and pray that this store/load does

		 * not cause yet another CEE trap.

		 */

tl1_cee:	membar	#Sync

		stx	%g1, [%g6 + TI_CEE_STUFF]

		ldxa	[%g0] ASI_AFSR, %g1

		membar	#Sync

		stxa	%g1, [%g0] ASI_AFSR

		membar	#Sync

		ldx	[%g6 + TI_CEE_STUFF], %g1

		retry



tl1_cee:	BTRAPTL1(0x63)

tl1_iamiss:	BTRAPTL1(0x64) BTRAPTL1(0x65) BTRAPTL1(0x66) BTRAPTL1(0x67)

tl1_damiss:

#include	"dtlb_miss.S"

include/asm-sparc64/thread_info.h

+3 −6
Original line number Diff line number Diff line
@@ -64,8 +64,6 @@ struct thread_info { 
	__u64			kernel_cntd0, kernel_cntd1;

	__u64			pcr_reg;



	__u64			cee_stuff;



	struct restart_block	restart_block;



	struct pt_regs		*kern_una_regs;
@@ -104,10 +102,9 @@ struct thread_info { 
#define TI_KERN_CNTD0	0x00000480

#define TI_KERN_CNTD1	0x00000488

#define TI_PCR		0x00000490

#define TI_CEE_STUFF	0x00000498

#define TI_RESTART_BLOCK 0x000004a0

#define TI_KUNA_REGS	0x000004c8

#define TI_KUNA_INSN	0x000004d0

#define TI_RESTART_BLOCK 0x00000498

#define TI_KUNA_REGS	0x000004c0

#define TI_KUNA_INSN	0x000004c8

#define TI_FPREGS	0x00000500



/* We embed this in the uppermost byte of thread_info->flags */