Commit 7c472127 authored by Kieran Bingham's avatar Kieran Bingham Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a779a0: Add VSPD support 



Provide VSPD support on the R-Car V3U SoC.

Signed-off-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210322172919.1154686-3-kieran.bingham+renesas@ideasonboard.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent e91bb146

arch/arm64/boot/dts/renesas/r8a779a0.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -1118,6 +1118,28 @@ fcpvd1: fcp@fea11000 { 
			resets = <&cpg 509>;

		};



		vspd0: vsp@fea20000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea20000 0 0x5000>;

			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 830>;

			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

			resets = <&cpg 830>;



			renesas,fcp = <&fcpvd0>;

		};



		vspd1: vsp@fea28000 {

			compatible = "renesas,vsp2";

			reg = <0 0xfea28000 0 0x5000>;

			interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 831>;

			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

			resets = <&cpg 831>;



			renesas,fcp = <&fcpvd1>;

		};



		prr: chipid@fff00044 {

			compatible = "renesas,prr";

			reg = <0 0xfff00044 0 4>;