Commit 7cba3cbc authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

pinctrl: renesas: r8a7791: Share QSPI pin group data 



Pin groups qspi_data2{,_b} are subsets of qspi_data4{,_b}.

This reduces kernel size by 32 bytes.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fbfd27a143e87fdb94acec2e3fa8db9029e2c99c.1640269757.git.geert+renesas@glider.be
parent bf5da1c0

drivers/pinctrl/renesas/pfc-r8a7791.c

+8 −22
Original line number Original line Diff line number Diff line
@@ -3198,19 +3198,12 @@ static const unsigned int qspi_ctrl_pins[] = { 
static const unsigned int qspi_ctrl_mux[] = {

static const unsigned int qspi_ctrl_mux[] = {

	SPCLK_MARK, SSL_MARK,

	SPCLK_MARK, SSL_MARK,

};

};

static const unsigned int qspi_data2_pins[] = {

static const unsigned int qspi_data_pins[] = {

	/* MOSI_IO0, MISO_IO1 */

	RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),

};

static const unsigned int qspi_data2_mux[] = {

	MOSI_IO0_MARK, MISO_IO1_MARK,

};

static const unsigned int qspi_data4_pins[] = {

	/* MOSI_IO0, MISO_IO1, IO2, IO3 */

	/* MOSI_IO0, MISO_IO1, IO2, IO3 */

	RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),

	RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),

	RCAR_GP_PIN(1, 8),

	RCAR_GP_PIN(1, 8),

};

};

static const unsigned int qspi_data4_mux[] = {

static const unsigned int qspi_data_mux[] = {

	MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK,

	MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK,

};

};
@@ -3221,19 +3214,12 @@ static const unsigned int qspi_ctrl_b_pins[] = { 
static const unsigned int qspi_ctrl_b_mux[] = {

static const unsigned int qspi_ctrl_b_mux[] = {

	SPCLK_B_MARK, SSL_B_MARK,

	SPCLK_B_MARK, SSL_B_MARK,

};

};

static const unsigned int qspi_data2_b_pins[] = {

static const unsigned int qspi_data_b_pins[] = {

	/* MOSI_IO0, MISO_IO1 */

	RCAR_GP_PIN(6, 1), RCAR_GP_PIN(6, 2),

};

static const unsigned int qspi_data2_b_mux[] = {

	MOSI_IO0_B_MARK, MISO_IO1_B_MARK,

};

static const unsigned int qspi_data4_b_pins[] = {

	/* MOSI_IO0, MISO_IO1, IO2, IO3 */

	/* MOSI_IO0, MISO_IO1, IO2, IO3 */

	RCAR_GP_PIN(6, 1), RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3),

	RCAR_GP_PIN(6, 1), RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3),

	RCAR_GP_PIN(6, 4),

	RCAR_GP_PIN(6, 4),

};

};

static const unsigned int qspi_data4_b_mux[] = {

static const unsigned int qspi_data_b_mux[] = {

	MOSI_IO0_B_MARK, MISO_IO1_B_MARK, IO2_B_MARK, IO3_B_MARK,

	MOSI_IO0_B_MARK, MISO_IO1_B_MARK, IO2_B_MARK, IO3_B_MARK,

};

};

/* - SCIF0 ------------------------------------------------------------------ */

/* - SCIF0 ------------------------------------------------------------------ */
@@ -4648,11 +4634,11 @@ static const struct { 
		SH_PFC_PIN_GROUP(pwm5_b),

		SH_PFC_PIN_GROUP(pwm5_b),

		SH_PFC_PIN_GROUP(pwm6),

		SH_PFC_PIN_GROUP(pwm6),

		SH_PFC_PIN_GROUP(qspi_ctrl),

		SH_PFC_PIN_GROUP(qspi_ctrl),

		SH_PFC_PIN_GROUP(qspi_data2),

		BUS_DATA_PIN_GROUP(qspi_data, 2),

		SH_PFC_PIN_GROUP(qspi_data4),

		BUS_DATA_PIN_GROUP(qspi_data, 4),

		SH_PFC_PIN_GROUP(qspi_ctrl_b),

		SH_PFC_PIN_GROUP(qspi_ctrl_b),

		SH_PFC_PIN_GROUP(qspi_data2_b),

		BUS_DATA_PIN_GROUP(qspi_data, 2, _b),

		SH_PFC_PIN_GROUP(qspi_data4_b),

		BUS_DATA_PIN_GROUP(qspi_data, 4, _b),

		SH_PFC_PIN_GROUP(scif0_data),

		SH_PFC_PIN_GROUP(scif0_data),

		SH_PFC_PIN_GROUP(scif0_data_b),

		SH_PFC_PIN_GROUP(scif0_data_b),

		SH_PFC_PIN_GROUP(scif0_data_c),

		SH_PFC_PIN_GROUP(scif0_data_c),