Commit 81685b3d authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Nishanth Menon
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arm64: dts: ti: Trim addresses to 8 digits



Hex numbers in addresses and sizes should be rather eight digits, not
nine.  Drop leading zeros.  No functional change (same DTB).

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20221115105044.95225-1-krzysztof.kozlowski@linaro.org
parent 45924dff
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+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ wkup_uart0: serial@2b300000 {

	wkup_i2c0: i2c@2b200000 {
		compatible = "ti,am64-i2c", "ti,omap4-i2c";
		reg = <0x00 0x02b200000 0x00 0x100>;
		reg = <0x00 0x2b200000 0x00 0x100>;
		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ wkup_uart0: serial@2b300000 {

	wkup_i2c0: i2c@2b200000 {
		compatible = "ti,am64-i2c", "ti,omap4-i2c";
		reg = <0x00 0x02b200000 0x00 0x100>;
		reg = <0x00 0x2b200000 0x00 0x100>;
		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
+2 −2
Original line number Diff line number Diff line
@@ -1369,8 +1369,8 @@ gpmc0: memory-controller@3b000000 {
		power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
		clocks = <&k3_clks 80 0>;
		clock-names = "fck";
		reg = <0x00 0x03b000000 0x00 0x400>,
		      <0x00 0x050000000 0x00 0x8000000>;
		reg = <0x00 0x3b000000 0x00 0x400>,
		      <0x00 0x50000000 0x00 0x8000000>;
		reg-names = "cfg", "data";
		interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
		gpmc,num-cs = <3>;
+1 −1
Original line number Diff line number Diff line
@@ -355,7 +355,7 @@ serdes_mux: mux-controller {

		dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
			compatible = "syscon";
			reg = <0x0000041e0 0x14>;
			reg = <0x000041e0 0x14>;
		};

		ehrpwm_tbclk: clock@4140 {