SM501: Clock updates and checks

Ensure that the M1XCLK and MCLK are sourced from the same PLL (and refuse to
bind the driver if they are not).

Update the PCI to safe initialisation values, as 72MHz is the maximum clock
for 33MHz PCI bus mastering.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>