Loading arch/x86/xen/enlighten.c +1 −2 Original line number Diff line number Diff line Loading @@ -890,7 +890,6 @@ void __init xen_setup_vcpu_info_placement(void) pv_irq_ops.irq_disable = xen_irq_disable_direct; pv_irq_ops.irq_enable = xen_irq_enable_direct; pv_mmu_ops.read_cr2 = xen_read_cr2_direct; pv_cpu_ops.iret = xen_iret_direct; } } Loading Loading @@ -994,7 +993,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = { .read_tsc = native_read_tsc, .read_pmc = native_read_pmc, .iret = (void *)&hypercall_page[__HYPERVISOR_iret], .iret = xen_iret, .irq_enable_syscall_ret = NULL, /* never called */ .load_tr_desc = paravirt_nop, Loading arch/x86/xen/xen-asm.S +3 −8 Original line number Diff line number Diff line Loading @@ -135,13 +135,8 @@ ENDPATCH(xen_restore_fl_direct) current stack state in whatever form its in, we keep things simple by only using a single register which is pushed/popped on the stack. Non-direct iret could be done in the same way, but it would require an annoying amount of code duplication. We'll assume that direct mode will be the common case once the hypervisor support becomes commonplace. */ ENTRY(xen_iret_direct) ENTRY(xen_iret) /* test eflags for special cases */ testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp) jnz hyper_iret Loading @@ -155,9 +150,9 @@ ENTRY(xen_iret_direct) GET_THREAD_INFO(%eax) movl TI_cpu(%eax),%eax movl __per_cpu_offset(,%eax,4),%eax lea per_cpu__xen_vcpu_info(%eax),%eax mov per_cpu__xen_vcpu(%eax),%eax #else movl $per_cpu__xen_vcpu_info, %eax movl per_cpu__xen_vcpu, %eax #endif /* check IF state we're restoring */ Loading arch/x86/xen/xen-ops.h +1 −1 Original line number Diff line number Diff line Loading @@ -63,5 +63,5 @@ DECL_ASM(void, xen_irq_disable_direct, void); DECL_ASM(unsigned long, xen_save_fl_direct, void); DECL_ASM(void, xen_restore_fl_direct, unsigned long); void xen_iret_direct(void); void xen_iret(void); #endif /* XEN_OPS_H */ Loading
arch/x86/xen/enlighten.c +1 −2 Original line number Diff line number Diff line Loading @@ -890,7 +890,6 @@ void __init xen_setup_vcpu_info_placement(void) pv_irq_ops.irq_disable = xen_irq_disable_direct; pv_irq_ops.irq_enable = xen_irq_enable_direct; pv_mmu_ops.read_cr2 = xen_read_cr2_direct; pv_cpu_ops.iret = xen_iret_direct; } } Loading Loading @@ -994,7 +993,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = { .read_tsc = native_read_tsc, .read_pmc = native_read_pmc, .iret = (void *)&hypercall_page[__HYPERVISOR_iret], .iret = xen_iret, .irq_enable_syscall_ret = NULL, /* never called */ .load_tr_desc = paravirt_nop, Loading
arch/x86/xen/xen-asm.S +3 −8 Original line number Diff line number Diff line Loading @@ -135,13 +135,8 @@ ENDPATCH(xen_restore_fl_direct) current stack state in whatever form its in, we keep things simple by only using a single register which is pushed/popped on the stack. Non-direct iret could be done in the same way, but it would require an annoying amount of code duplication. We'll assume that direct mode will be the common case once the hypervisor support becomes commonplace. */ ENTRY(xen_iret_direct) ENTRY(xen_iret) /* test eflags for special cases */ testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp) jnz hyper_iret Loading @@ -155,9 +150,9 @@ ENTRY(xen_iret_direct) GET_THREAD_INFO(%eax) movl TI_cpu(%eax),%eax movl __per_cpu_offset(,%eax,4),%eax lea per_cpu__xen_vcpu_info(%eax),%eax mov per_cpu__xen_vcpu(%eax),%eax #else movl $per_cpu__xen_vcpu_info, %eax movl per_cpu__xen_vcpu, %eax #endif /* check IF state we're restoring */ Loading
arch/x86/xen/xen-ops.h +1 −1 Original line number Diff line number Diff line Loading @@ -63,5 +63,5 @@ DECL_ASM(void, xen_irq_disable_direct, void); DECL_ASM(unsigned long, xen_save_fl_direct, void); DECL_ASM(void, xen_restore_fl_direct, unsigned long); void xen_iret_direct(void); void xen_iret(void); #endif /* XEN_OPS_H */