Commit 828d6fde authored by Tianci.Yin's avatar Tianci.Yin Committed by Alex Deucher
Browse files

drm/amdgpu/psp: move TMR to cpu invisible vram region 



so that more visible vram can be available for umd.

Reviewed-by: default avatarChristian König <christian.koenig@amd.com&gt;.>
Signed-off-by: default avatarTianci.Yin <tianci.yin@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 50e275e8

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

+3 −2
Original line number Diff line number Diff line
@@ -246,8 +246,9 @@ int amdgpu_bo_create_reserved(struct amdgpu_device *adev, 
	bp.size = size;

	bp.byte_align = align;

	bp.domain = domain;

	bp.flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |

		AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;

	bp.flags = cpu_addr ? AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED

		: AMDGPU_GEM_CREATE_NO_CPU_ACCESS;

	bp.flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;

	bp.type = ttm_bo_type_kernel;

	bp.resv = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+2 −2
Original line number Diff line number Diff line
@@ -263,7 +263,7 @@ static int psp_tmr_init(struct psp_context *psp) 


	ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE,

				      AMDGPU_GEM_DOMAIN_VRAM,

				      &psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);

				      &psp->tmr_bo, &psp->tmr_mc_addr, NULL);



	return ret;

}
@@ -1216,7 +1216,7 @@ static int psp_hw_fini(void *handle) 


	psp_ring_destroy(psp, PSP_RING_TYPE__KM);



	amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);

	amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, NULL);

	amdgpu_bo_free_kernel(&psp->fw_pri_bo,

			      &psp->fw_pri_mc_addr, &psp->fw_pri_buf);

	amdgpu_bo_free_kernel(&psp->fence_buf_bo,

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

+0 −1
Original line number Diff line number Diff line
@@ -171,7 +171,6 @@ struct psp_context 
	/* tmr buffer */

	struct amdgpu_bo		*tmr_bo;

	uint64_t			tmr_mc_addr;

	void				*tmr_buf;



	/* asd firmware and buffer */

	const struct firmware		*asd_fw;