Commit 83b7f0b8 authored Dec 01, 2021 by Dmitry Osipenko Committed by Thierry Reding Dec 16, 2021

ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees



Add OPP tables and power domains to all peripheral devices which
support power management on Tegra20 SoC.

Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

parent 3478494d

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts

+1 −0

Original line number	Diff line number	Diff line
		@@ -718,6 +718,7 @@ pmc@7000e400 {
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <458>;
		nvidia,sys-clock-req-active-high;
		core-supply = <&vdd_core>;
		};

		usb@c5000000 {

arch/arm/boot/dts/tegra20-colibri.dtsi

+2 −1

Original line number	Diff line number	Diff line
		@@ -497,7 +497,7 @@ reg_3v3_vsys: sys {
		regulator-always-on;
		};

		sm0 {
		vdd_core: sm0 {
		regulator-name = "VDD_CORE_1.2V";
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		@@ -603,6 +603,7 @@ pmc@7000e400 {
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <3875>;
		nvidia,sys-clock-req-active-high;
		core-supply = <&vdd_core>;

		/* Set SLEEP MODE bit in SUPPLYENE register of TPS658643 PMIC */
		i2c-thermtrip {

arch/arm/boot/dts/tegra20-harmony.dts

+2 −1

Original line number	Diff line number	Diff line
		@@ -339,7 +339,7 @@ sys_reg: sys {
		regulator-always-on;
		};

		sm0 {
		vdd_core: sm0 {
		regulator-name = "vdd_sm0,vdd_core";
		regulator-min-microvolt = <1200000>;
		regulator-max-microvolt = <1200000>;
		@@ -565,6 +565,7 @@ pmc@7000e400 {
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <3875>;
		nvidia,sys-clock-req-active-high;
		core-supply = <&vdd_core>;
		};

		pcie@80003000 {

arch/arm/boot/dts/tegra20-paz00.dts

+1 −0

Original line number	Diff line number	Diff line
		@@ -519,6 +519,7 @@ pmc@7000e400 {
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <0>;
		nvidia,sys-clock-req-active-high;
		core-supply = <&core_vdd_reg>;
		};

		usb@c5000000 {

arch/arm/boot/dts/tegra20-peripherals-opp.dtsi

+912 −0

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