Commit 83f73168 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

ARM: omap2: remove unused USB code 



Some musb related code is no longer in use after commit 4d62dbda
("ARM: OMAP3: Remove legacy support for am3517-evm") and can be removed.

Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent c476a78f

arch/arm/mach-omap2/common.h

+0 −2
Original line number Diff line number Diff line
@@ -40,8 +40,6 @@ 
#include "i2c.h"

#include "serial.h"



#include "usb.h"



#define OMAP_INTC_START		NR_IRQS



extern int (*omap_pm_soc_init)(void);

arch/arm/mach-omap2/omap_phy_internal.c

+0 −87
Original line number Diff line number Diff line
@@ -19,7 +19,6 @@ 


#include "soc.h"

#include "control.h"

#include "usb.h"



#define CONTROL_DEV_CONF		0x300

#define PHY_PD				0x1
@@ -52,89 +51,3 @@ static int __init omap4430_phy_power_down(void) 
	return 0;

}

omap_early_initcall(omap4430_phy_power_down);
 


void am35x_musb_reset(void)

{

	u32	regval;



	/* Reset the musb interface */

	regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);



	regval |= AM35XX_USBOTGSS_SW_RST;

	omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);



	regval &= ~AM35XX_USBOTGSS_SW_RST;

	omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);



	regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);

}



void am35x_musb_phy_power(u8 on)

{

	unsigned long timeout = jiffies + msecs_to_jiffies(100);

	u32 devconf2;



	if (on) {

		/*

		 * Start the on-chip PHY and its PLL.

		 */

		devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



		devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);

		devconf2 |= CONF2_PHY_PLLON;



		omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);



		pr_info("Waiting for PHY clock good...\n");

		while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)

				& CONF2_PHYCLKGD)) {

			cpu_relax();



			if (time_after(jiffies, timeout)) {

				pr_err("musb PHY clock good timed out\n");

				break;

			}

		}

	} else {

		/*

		 * Power down the on-chip PHY.

		 */

		devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



		devconf2 &= ~CONF2_PHY_PLLON;

		devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;

		omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);

	}

}



void am35x_musb_clear_irq(void)

{

	u32 regval;



	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);

	regval |= AM35XX_USBOTGSS_INT_CLR;

	omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);

	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);

}



void am35x_set_mode(u8 musb_mode)

{

	u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



	devconf2 &= ~CONF2_OTGMODE;

	switch (musb_mode) {

	case MUSB_HOST:		/* Force VBUS valid, ID = 0 */

		devconf2 |= CONF2_FORCE_HOST;

		break;

	case MUSB_PERIPHERAL:	/* Force VBUS valid, ID = 1 */

		devconf2 |= CONF2_FORCE_DEVICE;

		break;

	case MUSB_OTG:		/* Don't override the VBUS/ID comparators */

		devconf2 |= CONF2_NO_OVERRIDE;

		break;

	default:

		pr_info("Unsupported mode %u\n", musb_mode);

	}



	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);

}

arch/arm/mach-omap2/usb.h

deleted100644 → 0
+0 −71
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#include <linux/platform_data/usb-omap.h>



/* AM35x */

/* USB 2.0 PHY Control */

#define CONF2_PHY_GPIOMODE	(1 << 23)

#define CONF2_OTGMODE		(3 << 14)

#define CONF2_NO_OVERRIDE	(0 << 14)

#define CONF2_FORCE_HOST	(1 << 14)

#define CONF2_FORCE_DEVICE	(2 << 14)

#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)

#define CONF2_SESENDEN		(1 << 13)

#define CONF2_VBDTCTEN		(1 << 12)

#define CONF2_REFFREQ_24MHZ	(2 << 8)

#define CONF2_REFFREQ_26MHZ	(7 << 8)

#define CONF2_REFFREQ_13MHZ	(6 << 8)

#define CONF2_REFFREQ		(0xf << 8)

#define CONF2_PHYCLKGD		(1 << 7)

#define CONF2_VBUSSENSE		(1 << 6)

#define CONF2_PHY_PLLON		(1 << 5)

#define CONF2_RESET		(1 << 4)

#define CONF2_PHYPWRDN		(1 << 3)

#define CONF2_OTGPWRDN		(1 << 2)

#define CONF2_DATPOL		(1 << 1)



/* TI81XX specific definitions */

#define USBCTRL0	0x620

#define USBSTAT0	0x624



/* TI816X PHY controls bits */

#define TI816X_USBPHY0_NORMAL_MODE	(1 << 0)

#define TI816X_USBPHY_REFCLK_OSC	(1 << 8)



/* TI814X PHY controls bits */

#define USBPHY_CM_PWRDN		(1 << 0)

#define USBPHY_OTG_PWRDN	(1 << 1)

#define USBPHY_CHGDET_DIS	(1 << 2)

#define USBPHY_CHGDET_RSTRT	(1 << 3)

#define USBPHY_SRCONDM		(1 << 4)

#define USBPHY_SINKONDP		(1 << 5)

#define USBPHY_CHGISINK_EN	(1 << 6)

#define USBPHY_CHGVSRC_EN	(1 << 7)

#define USBPHY_DMPULLUP		(1 << 8)

#define USBPHY_DPPULLUP		(1 << 9)

#define USBPHY_CDET_EXTCTL	(1 << 10)

#define USBPHY_GPIO_MODE	(1 << 12)

#define USBPHY_DPOPBUFCTL	(1 << 13)

#define USBPHY_DMOPBUFCTL	(1 << 14)

#define USBPHY_DPINPUT		(1 << 15)

#define USBPHY_DMINPUT		(1 << 16)

#define USBPHY_DPGPIO_PD	(1 << 17)

#define USBPHY_DMGPIO_PD	(1 << 18)

#define USBPHY_OTGVDET_EN	(1 << 19)

#define USBPHY_OTGSESSEND_EN	(1 << 20)

#define USBPHY_DATA_POLARITY	(1 << 23)



struct usbhs_phy_data {

	int port;		/* 1 indexed port number */

	int reset_gpio;

	int vcc_gpio;

	bool vcc_polarity;	/* 1 active high, 0 active low */

};



extern void usb_musb_init(struct omap_musb_board_data *board_data);

extern void usbhs_init(struct usbhs_omap_platform_data *pdata);

extern int usbhs_init_phys(struct usbhs_phy_data *phy, int num_phys);



extern void am35x_musb_reset(void);

extern void am35x_musb_phy_power(u8 on);

extern void am35x_musb_clear_irq(void);

extern void am35x_set_mode(u8 musb_mode);