Commit 8426ed9c authored by Zack Rusin's avatar Zack Rusin
Browse files

drm/vmwgfx: Cleanup the cmd/fifo split 



Lets try to cleanup the usage of the term FIFO which we used for
both our MMIO based cmd queue processing and for general
command processing which could have been using command buffers
interface. We're going to rename the functions which are processing
commands (and work either via MMIO or command buffers) as _cmd_
and functions which operate on the MMIO based commands as FIFO
to match the SVGA device naming.

Signed-off-by: default avatarZack Rusin <zackr@vmware.com>
Reviewed-by: default avatarMartin Krastev <krastevm@vmware.com>
Link: https://patchwork.freedesktop.org/patch/414044/?series=85516&rev=2
parent 359dc60d

drivers/gpu/drm/vmwgfx/Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \

	    vmwgfx_fb.o vmwgfx_ioctl.o vmwgfx_resource.o vmwgfx_ttm_buffer.o \

	    vmwgfx_fifo.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \

	    vmwgfx_cmd.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \

	    vmwgfx_overlay.o vmwgfx_gmrid_manager.o vmwgfx_fence.o \

	    vmwgfx_bo.o vmwgfx_scrn.o vmwgfx_context.o \

	    vmwgfx_surface.o vmwgfx_prime.o vmwgfx_mob.o vmwgfx_shader.o \

drivers/gpu/drm/vmwgfx/vmwgfx_binding.c

+26 −26
Original line number Diff line number Diff line
@@ -555,7 +555,7 @@ static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind) 
		SVGA3dCmdSetShader body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -564,7 +564,7 @@ static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind) 
	cmd->body.cid = bi->ctx->id;

	cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;

	cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -587,7 +587,7 @@ static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi, 
		SVGA3dCmdSetRenderTarget body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -598,7 +598,7 @@ static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi, 
	cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);

	cmd->body.target.face = 0;

	cmd->body.target.mipmap = 0;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -626,7 +626,7 @@ static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, 
		} body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -636,7 +636,7 @@ static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, 
	cmd->body.s1.stage = binding->texture_stage;

	cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;

	cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -657,7 +657,7 @@ static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind) 
		SVGA3dCmdDXSetShader body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -665,7 +665,7 @@ static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind) 
	cmd->header.size = sizeof(cmd->body);

	cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;

	cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -686,7 +686,7 @@ static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind) 
		SVGA3dCmdDXSetSingleConstantBuffer body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -703,7 +703,7 @@ static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind) 
		cmd->body.sizeInBytes = 0;

		cmd->body.sid = SVGA3D_INVALID_ID;

	}

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -810,7 +810,7 @@ static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs, 


	view_id_size = cbs->bind_cmd_count*sizeof(uint32);

	cmd_size = sizeof(*cmd) + view_id_size;

	cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -821,7 +821,7 @@ static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs, 


	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);



	vmw_fifo_commit(ctx->dev_priv, cmd_size);

	vmw_cmd_commit(ctx->dev_priv, cmd_size);

	bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,

		     cbs->bind_first_slot, cbs->bind_cmd_count);
@@ -846,7 +846,7 @@ static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs) 
	vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS);

	view_id_size = cbs->bind_cmd_count*sizeof(uint32);

	cmd_size = sizeof(*cmd) + view_id_size;

	cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -860,7 +860,7 @@ static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs) 


	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);



	vmw_fifo_commit(ctx->dev_priv, cmd_size);

	vmw_cmd_commit(ctx->dev_priv, cmd_size);



	return 0;
@@ -930,7 +930,7 @@ static int vmw_emit_set_so_target(struct vmw_ctx_binding_state *cbs) 


	so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);

	cmd_size = sizeof(*cmd) + so_target_size;

	cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -938,7 +938,7 @@ static int vmw_emit_set_so_target(struct vmw_ctx_binding_state *cbs) 
	cmd->header.size = sizeof(cmd->body) + so_target_size;

	memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);



	vmw_fifo_commit(ctx->dev_priv, cmd_size);

	vmw_cmd_commit(ctx->dev_priv, cmd_size);



	return 0;
@@ -1044,7 +1044,7 @@ static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs) 


	set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);

	cmd_size = sizeof(*cmd) + set_vb_size;

	cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -1054,7 +1054,7 @@ static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs) 


	memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);



	vmw_fifo_commit(ctx->dev_priv, cmd_size);

	vmw_cmd_commit(ctx->dev_priv, cmd_size);

	bitmap_clear(cbs->dirty_vb,

		     cbs->bind_first_slot, cbs->bind_cmd_count);
@@ -1074,7 +1074,7 @@ static int vmw_emit_set_uav(struct vmw_ctx_binding_state *cbs) 
	vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);

	view_id_size = cbs->bind_cmd_count*sizeof(uint32);

	cmd_size = sizeof(*cmd) + view_id_size;

	cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);

	if (!cmd)

		return -ENOMEM;
@@ -1086,7 +1086,7 @@ static int vmw_emit_set_uav(struct vmw_ctx_binding_state *cbs) 


	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);



	vmw_fifo_commit(ctx->dev_priv, cmd_size);

	vmw_cmd_commit(ctx->dev_priv, cmd_size);



	return 0;

}
@@ -1104,7 +1104,7 @@ static int vmw_emit_set_cs_uav(struct vmw_ctx_binding_state *cbs) 
	vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_UAVIEWS);

	view_id_size = cbs->bind_cmd_count*sizeof(uint32);

	cmd_size = sizeof(*cmd) + view_id_size;

	cmd = VMW_FIFO_RESERVE_DX(ctx->dev_priv, cmd_size, ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);

	if (!cmd)

		return -ENOMEM;
@@ -1116,7 +1116,7 @@ static int vmw_emit_set_cs_uav(struct vmw_ctx_binding_state *cbs) 


	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);



	vmw_fifo_commit(ctx->dev_priv, cmd_size);

	vmw_cmd_commit(ctx->dev_priv, cmd_size);



	return 0;

}
@@ -1263,7 +1263,7 @@ static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind) 
		SVGA3dCmdDXSetIndexBuffer body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -1279,7 +1279,7 @@ static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind) 
		cmd->body.offset = 0;

	}



	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -1315,14 +1315,14 @@ static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind) 
		SVGA3dCmdDXSetStreamOutput body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);

	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);

	if (!cmd)

		return -ENOMEM;



	cmd->header.id = SVGA_3D_CMD_DX_SET_STREAMOUTPUT;

	cmd->header.size = sizeof(cmd->body);

	cmd->body.soid = rebind ? bi->res->id : SVGA3D_INVALID_ID;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}

drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c→drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c

+16 −15
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0 OR MIT

/**************************************************************************

 *

 * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA

 * Copyright 2009-2020 VMware, Inc., Palo Alto, CA., USA

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the
@@ -36,7 +36,7 @@ struct vmw_temp_set_context { 
	SVGA3dCmdDXTempSetContext body;

};



bool vmw_fifo_have_3d(struct vmw_private *dev_priv)

bool vmw_supports_3d(struct vmw_private *dev_priv)

{

	uint32_t fifo_min, hwversion;

	const struct vmw_fifo_state *fifo = &dev_priv->fifo;
@@ -126,6 +126,7 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) 


	vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE |

		  SVGA_REG_ENABLE_HIDE);



	vmw_write(dev_priv, SVGA_REG_TRACES, 0);



	min = 4;
@@ -373,7 +374,7 @@ static void *vmw_local_fifo_reserve(struct vmw_private *dev_priv, 
	return NULL;

}



void *vmw_fifo_reserve_dx(struct vmw_private *dev_priv, uint32_t bytes,

void *vmw_cmd_ctx_reserve(struct vmw_private *dev_priv, uint32_t bytes,

			  int ctx_id)

{

	void *ret;
@@ -484,7 +485,7 @@ static void vmw_local_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes) 
	mutex_unlock(&fifo_state->fifo_mutex);

}



void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes)

void vmw_cmd_commit(struct vmw_private *dev_priv, uint32_t bytes)

{

	if (dev_priv->cman)

		vmw_cmdbuf_commit(dev_priv->cman, bytes, NULL, false);
@@ -499,7 +500,7 @@ void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes) 
 * @dev_priv: Pointer to device private structure.

 * @bytes: Number of bytes to commit.

 */

void vmw_fifo_commit_flush(struct vmw_private *dev_priv, uint32_t bytes)

void vmw_cmd_commit_flush(struct vmw_private *dev_priv, uint32_t bytes)

{

	if (dev_priv->cman)

		vmw_cmdbuf_commit(dev_priv->cman, bytes, NULL, true);
@@ -514,7 +515,7 @@ void vmw_fifo_commit_flush(struct vmw_private *dev_priv, uint32_t bytes) 
 * @dev_priv: Pointer to device private structure.

 * @interruptible: Whether to wait interruptible if function needs to sleep.

 */

int vmw_fifo_flush(struct vmw_private *dev_priv, bool interruptible)

int vmw_cmd_flush(struct vmw_private *dev_priv, bool interruptible)

{

	might_sleep();
@@ -524,7 +525,7 @@ int vmw_fifo_flush(struct vmw_private *dev_priv, bool interruptible) 
		return 0;

}



int vmw_fifo_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)

int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno)

{

	struct vmw_fifo_state *fifo_state = &dev_priv->fifo;

	struct svga_fifo_cmd_fence *cmd_fence;
@@ -532,7 +533,7 @@ int vmw_fifo_send_fence(struct vmw_private *dev_priv, uint32_t *seqno) 
	int ret = 0;

	uint32_t bytes = sizeof(u32) + sizeof(*cmd_fence);



	fm = VMW_FIFO_RESERVE(dev_priv, bytes);

	fm = VMW_CMD_RESERVE(dev_priv, bytes);

	if (unlikely(fm == NULL)) {

		*seqno = atomic_read(&dev_priv->marker_seq);

		ret = -ENOMEM;
@@ -552,14 +553,14 @@ int vmw_fifo_send_fence(struct vmw_private *dev_priv, uint32_t *seqno) 
		 * waiting code in vmwgfx_irq.c will emulate this.

		 */



		vmw_fifo_commit(dev_priv, 0);

		vmw_cmd_commit(dev_priv, 0);

		return 0;

	}



	*fm++ = SVGA_CMD_FENCE;

	cmd_fence = (struct svga_fifo_cmd_fence *) fm;

	cmd_fence->fence = *seqno;

	vmw_fifo_commit_flush(dev_priv, bytes);

	vmw_cmd_commit_flush(dev_priv, bytes);

	vmw_update_seqno(dev_priv, fifo_state);



out_err:
@@ -590,7 +591,7 @@ static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv, 
		SVGA3dCmdWaitForQuery body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -607,7 +608,7 @@ static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv, 
		cmd->body.guestResult.offset = 0;

	}



	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -636,7 +637,7 @@ static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv, 
		SVGA3dCmdWaitForGBQuery body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -648,7 +649,7 @@ static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv, 
	cmd->body.mobid = bo->mem.start;

	cmd->body.offset = 0;



	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -672,7 +673,7 @@ static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv, 
 *

 * Returns -ENOMEM on failure to reserve fifo space.

 */

int vmw_fifo_emit_dummy_query(struct vmw_private *dev_priv,

int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv,

			      uint32_t cid)

{

	if (dev_priv->has_mob)

drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c

+5 −9
Original line number Diff line number Diff line
@@ -610,7 +610,7 @@ static void vmw_cmdbuf_work_func(struct work_struct *work) 


	/* Send a new fence in case one was removed */

	if (send_fence) {

		vmw_fifo_send_fence(man->dev_priv, &dummy);

		vmw_cmd_send_fence(man->dev_priv, &dummy);

		wake_up_all(&man->idle_queue);

	}
@@ -1208,18 +1208,14 @@ static int vmw_cmdbuf_startstop(struct vmw_cmdbuf_man *man, u32 context, 
 *

 * @man: The command buffer manager.

 * @size: The size of the main space pool.

 * @default_size: The default size of the command buffer for small kernel

 * submissions.

 *

 * Set the size and allocate the main command buffer space pool,

 * as well as the default size of the command buffer for

 * small kernel submissions. If successful, this enables large command

 * submissions. Note that this function requires that rudimentary command

 * Set the size and allocate the main command buffer space pool.

 * If successful, this enables large command submissions.

 * Note that this function requires that rudimentary command

 * submission is already available and that the MOB memory manager is alive.

 * Returns 0 on success. Negative error code on failure.

 */

int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man,

			     size_t size, size_t default_size)

int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man, size_t size)

{

	struct vmw_private *dev_priv = man->dev_priv;

	bool dummy;

drivers/gpu/drm/vmwgfx/vmwgfx_context.c

+20 −20
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ static void vmw_hw_context_destroy(struct vmw_resource *res) 
	}



	vmw_execbuf_release_pinned_bo(dev_priv);

	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return;
@@ -171,7 +171,7 @@ static void vmw_hw_context_destroy(struct vmw_resource *res) 
	cmd->header.size = sizeof(cmd->body);

	cmd->body.cid = res->id;



	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));

	vmw_fifo_resource_dec(dev_priv);

}
@@ -265,7 +265,7 @@ static int vmw_context_init(struct vmw_private *dev_priv, 
		return -ENOMEM;

	}



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL)) {

		vmw_resource_unreference(&res);

		return -ENOMEM;
@@ -275,7 +275,7 @@ static int vmw_context_init(struct vmw_private *dev_priv, 
	cmd->header.size = sizeof(cmd->body);

	cmd->body.cid = res->id;



	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));

	vmw_fifo_resource_inc(dev_priv);

	res->hw_destroy = vmw_hw_context_destroy;

	return 0;
@@ -316,7 +316,7 @@ static int vmw_gb_context_create(struct vmw_resource *res) 
		goto out_no_fifo;

	}



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL)) {

		ret = -ENOMEM;

		goto out_no_fifo;
@@ -325,7 +325,7 @@ static int vmw_gb_context_create(struct vmw_resource *res) 
	cmd->header.id = SVGA_3D_CMD_DEFINE_GB_CONTEXT;

	cmd->header.size = sizeof(cmd->body);

	cmd->body.cid = res->id;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));

	vmw_fifo_resource_inc(dev_priv);



	return 0;
@@ -348,7 +348,7 @@ static int vmw_gb_context_bind(struct vmw_resource *res, 


	BUG_ON(bo->mem.mem_type != VMW_PL_MOB);



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -358,7 +358,7 @@ static int vmw_gb_context_bind(struct vmw_resource *res, 
	cmd->body.mobid = bo->mem.start;

	cmd->body.validContents = res->backup_dirty;

	res->backup_dirty = false;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));



	return 0;

}
@@ -392,7 +392,7 @@ static int vmw_gb_context_unbind(struct vmw_resource *res, 


	submit_size = sizeof(*cmd2) + (readback ? sizeof(*cmd1) : 0);



	cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);

	cmd = VMW_CMD_RESERVE(dev_priv, submit_size);

	if (unlikely(cmd == NULL)) {

		mutex_unlock(&dev_priv->binding_mutex);

		return -ENOMEM;
@@ -411,7 +411,7 @@ static int vmw_gb_context_unbind(struct vmw_resource *res, 
	cmd2->body.cid = res->id;

	cmd2->body.mobid = SVGA3D_INVALID_ID;



	vmw_fifo_commit(dev_priv, submit_size);

	vmw_cmd_commit(dev_priv, submit_size);

	mutex_unlock(&dev_priv->binding_mutex);



	/*
@@ -440,14 +440,14 @@ static int vmw_gb_context_destroy(struct vmw_resource *res) 
	if (likely(res->id == -1))

		return 0;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;



	cmd->header.id = SVGA_3D_CMD_DESTROY_GB_CONTEXT;

	cmd->header.size = sizeof(cmd->body);

	cmd->body.cid = res->id;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));

	if (dev_priv->query_cid == res->id)

		dev_priv->query_cid_valid = false;

	vmw_resource_release_id(res);
@@ -483,7 +483,7 @@ static int vmw_dx_context_create(struct vmw_resource *res) 
		goto out_no_fifo;

	}



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL)) {

		ret = -ENOMEM;

		goto out_no_fifo;
@@ -492,7 +492,7 @@ static int vmw_dx_context_create(struct vmw_resource *res) 
	cmd->header.id = SVGA_3D_CMD_DX_DEFINE_CONTEXT;

	cmd->header.size = sizeof(cmd->body);

	cmd->body.cid = res->id;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));

	vmw_fifo_resource_inc(dev_priv);



	return 0;
@@ -515,7 +515,7 @@ static int vmw_dx_context_bind(struct vmw_resource *res, 


	BUG_ON(bo->mem.mem_type != VMW_PL_MOB);



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;
@@ -525,7 +525,7 @@ static int vmw_dx_context_bind(struct vmw_resource *res, 
	cmd->body.mobid = bo->mem.start;

	cmd->body.validContents = res->backup_dirty;

	res->backup_dirty = false;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));





	return 0;
@@ -608,7 +608,7 @@ static int vmw_dx_context_unbind(struct vmw_resource *res, 


	submit_size = sizeof(*cmd2) + (readback ? sizeof(*cmd1) : 0);



	cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);

	cmd = VMW_CMD_RESERVE(dev_priv, submit_size);

	if (unlikely(cmd == NULL)) {

		mutex_unlock(&dev_priv->binding_mutex);

		return -ENOMEM;
@@ -627,7 +627,7 @@ static int vmw_dx_context_unbind(struct vmw_resource *res, 
	cmd2->body.cid = res->id;

	cmd2->body.mobid = SVGA3D_INVALID_ID;



	vmw_fifo_commit(dev_priv, submit_size);

	vmw_cmd_commit(dev_priv, submit_size);

	mutex_unlock(&dev_priv->binding_mutex);



	/*
@@ -656,14 +656,14 @@ static int vmw_dx_context_destroy(struct vmw_resource *res) 
	if (likely(res->id == -1))

		return 0;



	cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));

	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));

	if (unlikely(cmd == NULL))

		return -ENOMEM;



	cmd->header.id = SVGA_3D_CMD_DX_DESTROY_CONTEXT;

	cmd->header.size = sizeof(cmd->body);

	cmd->body.cid = res->id;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));

	vmw_cmd_commit(dev_priv, sizeof(*cmd));

	if (dev_priv->query_cid == res->id)

		dev_priv->query_cid_valid = false;

	vmw_resource_release_id(res);