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Commit 855c90d3 authored by Dan Williams's avatar Dan Williams
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tools/testing/cxl: Expand CFMWS windows



For the x2 host-bridge interleave windows, allow for a
x8-endpoint-interleave configuration per memory-type with each device
contributing the minimum 256MB extent. Similarly, for the x1 host-bridge
interleave windows, allow for a x4-endpoint-interleave configuration per
memory-type.

Bump up the number of decoders per-port to support hosting 8 regions.

Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/165603886721.551046.8682583835505795210.stgit@dwillia2-xfh


Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent b2f3b74e
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