Commit 8606cf79 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/vcn3.0: schedule instance 0 for decode and 1 for encode



VCN3 has 2 unsymmetrical instances, i.e there're less codecs
on instance 1, we use 0 for decode and 1 for encode for now

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1e09dfd7
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+4 −0
Original line number Diff line number Diff line
@@ -167,6 +167,8 @@ static int vcn_v3_0_sw_init(void *handle)
		ring = &adev->vcn.inst[i].ring_dec;
		ring->use_doorbell = true;
		ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i;
		if (i != 0)
			ring->no_scheduler = true;
		sprintf(ring->name, "vcn_dec_%d", i);
		r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,
				     AMDGPU_RING_PRIO_DEFAULT);
@@ -183,6 +185,8 @@ static int vcn_v3_0_sw_init(void *handle)
			ring = &adev->vcn.inst[i].ring_enc[j];
			ring->use_doorbell = true;
			ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + j + 8 * i;
			if (i != 1)
				ring->no_scheduler = true;
			sprintf(ring->name, "vcn_enc_%d.%d", i, j);
			r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst[i].irq, 0,
					     AMDGPU_RING_PRIO_DEFAULT);