Commit 86f82da5 authored by Kukjin Kim's avatar Kukjin Kim
Browse files

Merge branch 'next-samsung-cleanup-2' into next-samsung-devel-2 

Conflicts:
	arch/arm/plat-s5p/include/plat/pll.h
parents db3c94a7 e90a0f3c

arch/arm/mach-exynos4/include/mach/clkdev.h

deleted100644 → 0
+0 −7
Original line number Diff line number Diff line 
#ifndef __MACH_CLKDEV_H__

#define __MACH_CLKDEV_H__



#define __clk_get(clk) ({ 1; })

#define __clk_put(clk) do {} while (0)



#endif

arch/arm/mach-exynos4/setup-sdhci.c

+0 −47
Original line number Diff line number Diff line
@@ -10,16 +10,7 @@ 
 * published by the Free Software Foundation.

*/



#include <linux/kernel.h>

#include <linux/types.h>

#include <linux/interrupt.h>

#include <linux/platform_device.h>

#include <linux/io.h>



#include <linux/mmc/card.h>

#include <linux/mmc/host.h>



#include <plat/regs-sdhci.h>



/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
@@ -29,41 +20,3 @@ char *exynos4_hsmmc_clksrcs[4] = { 
	[2] = "sclk_mmc",	/* mmc_bus */

	[3] = NULL,

};
 


void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,

				  struct mmc_ios *ios, struct mmc_card *card)

{

	u32 ctrl2, ctrl3;



	/* don't need to alter anything according to card-type */



	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);



	/* select base clock source to HCLK */



	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;



	/*

	 * clear async mode, enable conflict mask, rx feedback ctrl, SD

	 * clk hold and no use debounce count

	 */



	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |

		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |

		  S3C_SDHCI_CTRL2_ENFBCLKRX |

		  S3C_SDHCI_CTRL2_DFCNT_NONE |

		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);



	/* Tx and Rx feedback clock delay control */



	if (ios->clock < 25 * 1000000)

		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |

			 S3C_SDHCI_CTRL3_FCSEL2 |

			 S3C_SDHCI_CTRL3_FCSEL1 |

			 S3C_SDHCI_CTRL3_FCSEL0);

	else

		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);



	writel(ctrl2, r + S3C_SDHCI_CONTROL2);

	writel(ctrl3, r + S3C_SDHCI_CONTROL3);

}

arch/arm/mach-s3c2410/mach-h1940.c

+3 −3
Original line number Diff line number Diff line
@@ -696,9 +696,9 @@ static void __init h1940_init(void) 
			      S3C2410_MISCCR_USBSUSPND0 |

			      S3C2410_MISCCR_USBSUSPND1, 0x0);



	tmp =   (0x78 << S3C24XX_PLLCON_MDIVSHIFT)

	      | (0x02 << S3C24XX_PLLCON_PDIVSHIFT)

	      | (0x03 << S3C24XX_PLLCON_SDIVSHIFT);

	tmp =   (0x78 << S3C24XX_PLL_MDIV_SHIFT)

	      | (0x02 << S3C24XX_PLL_PDIV_SHIFT)

	      | (0x03 << S3C24XX_PLL_SDIV_SHIFT);

	writel(tmp, S3C2410_UPLLCON);



	gpio_request(S3C2410_GPC(0), "LCD power");

arch/arm/mach-s3c2416/clock.c

+0 −1
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ 
#include <plat/cpu.h>



#include <plat/cpu-freq.h>

#include <plat/pll6553x.h>

#include <plat/pll.h>



#include <asm/mach/map.h>

arch/arm/mach-s3c2416/setup-sdhci.c

+0 −37
Original line number Diff line number Diff line
@@ -12,17 +12,7 @@ 
 * published by the Free Software Foundation.

*/



#include <linux/kernel.h>

#include <linux/types.h>

#include <linux/interrupt.h>

#include <linux/platform_device.h>

#include <linux/io.h>



#include <linux/mmc/card.h>

#include <linux/mmc/host.h>



#include <plat/regs-sdhci.h>

#include <plat/sdhci.h>



/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
@@ -32,30 +22,3 @@ char *s3c2416_hsmmc_clksrcs[4] = { 
	[2] = "hsmmc-if",

	/* [3] = "48m", - note not successfully used yet */

};
 


void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,

				  void __iomem *r,

				  struct mmc_ios *ios,

				  struct mmc_card *card)

{

	u32 ctrl2, ctrl3;



	ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2);

	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;

	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |

		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |

		  S3C_SDHCI_CTRL2_ENFBCLKRX |

		  S3C_SDHCI_CTRL2_DFCNT_NONE |

		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);



	if (ios->clock < 25 * 1000000)

		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |

			 S3C_SDHCI_CTRL3_FCSEL2 |

			 S3C_SDHCI_CTRL3_FCSEL1 |

			 S3C_SDHCI_CTRL3_FCSEL0);

	else

		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);



	__raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2);

	__raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3);

}