From 8747075f54fa0c5d30fcc48e5149c19c02641fa8 Mon Sep 17 00:00:00 2001 From: Paul Hsieh Date: Thu, 24 Nov 2022 13:03:26 +0800 Subject: [PATCH] drm/amd/display: read invalid ddc pin status cause engine busy [Why] There is no DDC_6 pin on new asic cause the mapping table is incorrect. When app try to access DDC_VGA port, driver read an invalid ddc pin status and report engine busy. [How] Add dummy DDC_6 pin to align gpio structure. Reviewed-by: Alvin Lee Acked-by: Stylon Wang Signed-off-by: Paul Hsieh Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c index 0ea52ba5ac827..9fd8b269dd79c 100644 --- a/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c +++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c @@ -256,8 +256,8 @@ static const struct hw_factory_funcs funcs = { */ void dal_hw_factory_dcn32_init(struct hw_factory *factory) { - factory->number_of_pins[GPIO_ID_DDC_DATA] = 6; - factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 6; + factory->number_of_pins[GPIO_ID_DDC_DATA] = 8; + factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8; factory->number_of_pins[GPIO_ID_GENERIC] = 4; factory->number_of_pins[GPIO_ID_HPD] = 5; factory->number_of_pins[GPIO_ID_GPIO_PAD] = 28; -- GitLab