Commit 875e2f5f authored by Florian Fainelli's avatar Florian Fainelli
Browse files

ARM: dts: NSP: Fix the bulk of W=1 DTC warnings 



Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent f6bf1729

arch/arm/boot/dts/bcm-nsp.dtsi

+3 −6
Original line number Original line Diff line number Diff line
@@ -77,7 +77,7 @@ pmu { 
		interrupt-affinity = <&cpu0>, <&cpu1>;

		interrupt-affinity = <&cpu0>, <&cpu1>;

	};

	};





	mpcore {

	mpcore@19000000 {

		compatible = "simple-bus";

		compatible = "simple-bus";

		ranges = <0x00000000 0x19000000 0x00023000>;

		ranges = <0x00000000 0x19000000 0x00023000>;

		#address-cells = <1>;

		#address-cells = <1>;
@@ -122,7 +122,7 @@ gic: interrupt-controller@21000 { 
			      <0x20100 0x100>;

			      <0x20100 0x100>;

		};

		};





		L2: l2-cache {

		L2: l2-cache@22000 {

			compatible = "arm,pl310-cache";

			compatible = "arm,pl310-cache";

			reg = <0x22000 0x1000>;

			reg = <0x22000 0x1000>;

			cache-unified;

			cache-unified;
@@ -166,7 +166,7 @@ periph_clk: periph_clk { 
		};

		};

	};

	};





	axi {

	axi@18000000 {

		compatible = "simple-bus";

		compatible = "simple-bus";

		ranges = <0x00000000 0x18000000 0x0011c40c>;

		ranges = <0x00000000 0x18000000 0x0011c40c>;

		#address-cells = <1>;

		#address-cells = <1>;
@@ -415,9 +415,6 @@ srab: srab@36000 { 
					  "imp_sleep_timer_p5",

					  "imp_sleep_timer_p5",

					  "imp_sleep_timer_p7",

					  "imp_sleep_timer_p7",

					  "imp_sleep_timer_p8";

					  "imp_sleep_timer_p8";

			#address-cells = <1>;

			#size-cells = <0>;



			status = "disabled";

			status = "disabled";





			/* ports are defined in board DTS */

			/* ports are defined in board DTS */

arch/arm/boot/dts/bcm958522er.dts

+1 −1
Original line number Original line Diff line number Diff line
@@ -43,7 +43,7 @@ chosen { 
		stdout-path = "serial0:115200n8";

		stdout-path = "serial0:115200n8";

	};

	};





	memory {

	memory@60000000 {

		device_type = "memory";

		device_type = "memory";

		reg = <0x60000000 0x80000000>;

		reg = <0x60000000 0x80000000>;

	};

	};

arch/arm/boot/dts/bcm958525er.dts

+1 −1
Original line number Original line Diff line number Diff line
@@ -43,7 +43,7 @@ chosen { 
		stdout-path = "serial0:115200n8";

		stdout-path = "serial0:115200n8";

	};

	};





	memory {

	memory@60000000 {

		device_type = "memory";

		device_type = "memory";

		reg = <0x60000000 0x80000000>;

		reg = <0x60000000 0x80000000>;

	};

	};

arch/arm/boot/dts/bcm958525xmc.dts

+1 −1
Original line number Original line Diff line number Diff line
@@ -43,7 +43,7 @@ chosen { 
		stdout-path = "serial0:115200n8";

		stdout-path = "serial0:115200n8";

	};

	};





	memory {

	memory@60000000 {

		device_type = "memory";

		device_type = "memory";

		reg = <0x60000000 0x40000000>;

		reg = <0x60000000 0x40000000>;

	};

	};

arch/arm/boot/dts/bcm958622hr.dts

+1 −1
Original line number Original line Diff line number Diff line
@@ -43,7 +43,7 @@ chosen { 
		stdout-path = "serial0:115200n8";

		stdout-path = "serial0:115200n8";

	};

	};





	memory {

	memory@60000000 {

		device_type = "memory";

		device_type = "memory";

		reg = <0x60000000 0x80000000>;

		reg = <0x60000000 0x80000000>;

	};

	};