Commit 876c38eb authored by Fabrice Gasnier's avatar Fabrice Gasnier Committed by Rob Herring
Browse files

dt-bindings: connector: usb: allow a single HS port 



Allow a single HS port to be used e.g. without reg property and a unit
address. OF graph allows a single port node, without 'reg' property.

This removes a couple of Warnings or errors on STM32MP boards.
When using single HS port currently, when doing building with W=1:
arch/arm/boot/dts/stm32mp157c-dk2.dtb: stusb1600@28: connector:
Unevaluated properties are not allowed ('port' was unexpected)

Signed-off-by: default avatarFabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20230620085633.533187-1-fabrice.gasnier@foss.st.com


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent e8b4858b

Documentation/devicetree/bindings/connector/usb-connector.yaml

+20 −0
Original line number Diff line number Diff line
@@ -168,6 +168,13 @@ properties: 
      offer the power, Capability Mismatch is set. Required for power sink and

      power dual role.



  port:

    $ref: /schemas/graph.yaml#/properties/port

    description: OF graph bindings modeling a data bus to the connector, e.g.

      there is a single High Speed (HS) port present in this connector. If there

      is more than one bus (several port, with 'reg' property), they can be grouped

      under 'ports'.



  ports:

    $ref: /schemas/graph.yaml#/properties/ports

    description: OF graph bindings modeling any data bus to the connector
@@ -322,6 +329,19 @@ examples: 
        };

    };



  # USB-C connector attached to SoC with a single High-Speed controller

  - |

    connector {

        compatible = "usb-c-connector";

        label = "USB-C";



        port {

            high_speed_ep: endpoint {

                remote-endpoint = <&usb_hs_ep>;

            };

        };

    };



  # USB-C connector attached to SoC and USB3 typec port controller(hd3ss3220)

  # with SS 2:1 MUX. HS lines routed to SoC, SS lines routed to the MUX and

  # the output of MUX is connected to the SoC.