Commit 87974051 authored by Devesh Sharma's avatar Devesh Sharma Committed by Jason Gunthorpe
Browse files

RDMA/bnxt_re: Update ABI to pass wqe-mode to user space 

Changing ucontext ABI response structure to pass wqe_mode to user library.
A flag in comp_mask has been set to indicate presence of wqe_mode.

Moved wqe-mode ABI to uapi/rdma/bnxt_re-abi.h

Link: https://lore.kernel.org/r/20210616202817.1185276-1-devesh.sharma@broadcom.com


Signed-off-by: default avatarDevesh Sharma <devesh.sharma@broadcom.com>
Reviewed-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent 84dcd8c7

drivers/infiniband/hw/bnxt_re/ib_verbs.c

+3 −0
Original line number Diff line number Diff line
@@ -3882,6 +3882,9 @@ int bnxt_re_alloc_ucontext(struct ib_ucontext *ctx, struct ib_udata *udata) 
	resp.max_cqd = dev_attr->max_cq_wqes;

	resp.rsvd    = 0;



	resp.comp_mask |= BNXT_RE_UCNTX_CMASK_HAVE_MODE;

	resp.mode = rdev->chip_ctx->modes.wqe_mode;



	rc = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp)));

	if (rc) {

		ibdev_err(ibdev, "Failed to copy user context");

drivers/infiniband/hw/bnxt_re/qplib_fp.h

+2 −0
Original line number Diff line number Diff line
@@ -39,6 +39,8 @@ 
#ifndef __BNXT_QPLIB_FP_H__

#define __BNXT_QPLIB_FP_H__



#include <rdma/bnxt_re-abi.h>



/* Few helper structures temporarily defined here

 * should get rid of these when roce_hsi.h is updated

 * in original code base

drivers/infiniband/hw/bnxt_re/qplib_res.h

+0 −6
Original line number Diff line number Diff line
@@ -45,12 +45,6 @@ extern const struct bnxt_qplib_gid bnxt_qplib_gid_zero; 
#define CHIP_NUM_57504		0x1751

#define CHIP_NUM_57502		0x1752



enum bnxt_qplib_wqe_mode {

	BNXT_QPLIB_WQE_MODE_STATIC	= 0x00,

	BNXT_QPLIB_WQE_MODE_VARIABLE	= 0x01,

	BNXT_QPLIB_WQE_MODE_INVALID	= 0x02

};



struct bnxt_qplib_drv_modes {

	u8	wqe_mode;

	/* Other modes to follow here */

include/uapi/rdma/bnxt_re-abi.h

+10 −1
Original line number Diff line number Diff line
@@ -49,7 +49,14 @@ 
#define BNXT_RE_CHIP_ID0_CHIP_MET_SFT		0x18



enum {

	BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL

	BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL,

	BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL,

};



enum bnxt_re_wqe_mode {

	BNXT_QPLIB_WQE_MODE_STATIC	= 0x00,

	BNXT_QPLIB_WQE_MODE_VARIABLE	= 0x01,

	BNXT_QPLIB_WQE_MODE_INVALID	= 0x02,

};



struct bnxt_re_uctx_resp {
@@ -62,6 +69,8 @@ struct bnxt_re_uctx_resp { 
	__aligned_u64 comp_mask;

	__u32 chip_id0;

	__u32 chip_id1;

	__u32 mode;

	__u32 rsvd1; /* padding */

};



/*