Commit 88ec8402 authored by Jitao Shi's avatar Jitao Shi Committed by Matthias Brugger
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arm64: dts: mt8183: Add dsi node 



Add dsi and mipitx nodes to the MT8183.

Signed-off-by: default avatarJitao Shi <jitao.shi@mediatek.com>
Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201127104930.1981497-2-enric.balletbo@collabora.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent f15722c0

arch/arm64/boot/dts/mediatek/mt8183.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -892,10 +892,27 @@ mmc1: mmc@11240000 { 
			status = "disabled";

		};



		mipi_tx0: mipi-dphy@11e50000 {

			compatible = "mediatek,mt8183-mipi-tx";

			reg = <0 0x11e50000 0 0x1000>;

			clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>;

			clock-names = "ref_clk";

			#clock-cells = <0>;

			#phy-cells = <0>;

			clock-output-names = "mipi_tx0_pll";

			nvmem-cells = <&mipi_tx_calibration>;

			nvmem-cell-names = "calibration-data";

		};



		efuse: efuse@11f10000 {

			compatible = "mediatek,mt8183-efuse",

				     "mediatek,efuse";

			reg = <0 0x11f10000 0 0x1000>;

			#address-cells = <1>;

			#size-cells = <1>;

			mipi_tx_calibration: calib@190 {

				reg = <0x190 0xc>;

			};

		};



		u3phy: usb-phy@11f40000 {
@@ -937,6 +954,20 @@ mmsys: syscon@14000000 { 
			#clock-cells = <1>;

		};



		dsi0: dsi@14014000 {

			compatible = "mediatek,mt8183-dsi";

			reg = <0 0x14014000 0 0x1000>;

			interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;

			power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;

			mediatek,syscon-dsi = <&mmsys 0x140>;

			clocks = <&mmsys CLK_MM_DSI0_MM>,

				 <&mmsys CLK_MM_DSI0_IF>,

				 <&mipi_tx0>;

			clock-names = "engine", "digital", "hs";

			phys = <&mipi_tx0>;

			phy-names = "dphy";

		};



		smi_common: smi@14019000 {

			compatible = "mediatek,mt8183-smi-common", "syscon";

			reg = <0 0x14019000 0 0x1000>;