Commit 89df3dbe authored by Bokun Zhang's avatar Bokun Zhang Committed by Alex Deucher
Browse files

drm/amdgpu/pm: Add notification for no DC support 



- There is a DPM issue where if DC is not present,
  FCLK will stay at low level.
  We need to send a SMU message to configure the DPM

- Reuse smu_v13_0_notify_display_change() for this purpose

Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarBokun Zhang <bokun.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 44e60b14

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

+1 −4
Original line number Diff line number Diff line
@@ -1031,10 +1031,7 @@ struct pptable_funcs { 
						   enum smu_feature_mask mask);



	/**

	 * @notify_display_change: Enable fast memory clock switching.

	 *

	 * Allows for fine grained memory clock switching but has more stringent

	 * timing requirements.

	 * @notify_display_change: General interface call to let SMU know about DC change

	 */

	int (*notify_display_change)(struct smu_context *smu);

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_0_ppsmc.h

+4 −1
Original line number Diff line number Diff line
@@ -138,7 +138,10 @@ 
#define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4A

#define PPSMC_MSG_SetPriorityDeltaGain           0x4B

#define PPSMC_MSG_AllowIHHostInterrupt           0x4C

#define PPSMC_Message_Count                      0x4D



#define PPSMC_MSG_DALNotPresent                  0x4E



#define PPSMC_Message_Count                      0x4F



//Debug Dump Message

#define DEBUGSMC_MSG_TestMessage                    0x1

drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h

+2 −1
Original line number Diff line number Diff line
@@ -245,7 +245,8 @@ 
	__SMU_DUMMY_MAP(AllowGpo),	\

	__SMU_DUMMY_MAP(Mode2Reset),	\

	__SMU_DUMMY_MAP(RequestI2cTransaction), \

	__SMU_DUMMY_MAP(GetMetricsTable),

	__SMU_DUMMY_MAP(GetMetricsTable), \

	__SMU_DUMMY_MAP(DALNotPresent),



#undef __SMU_DUMMY_MAP

#define __SMU_DUMMY_MAP(type)	SMU_MSG_##type

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

+2 −6
Original line number Diff line number Diff line
@@ -837,12 +837,8 @@ int smu_v13_0_notify_display_change(struct smu_context *smu) 
{

	int ret = 0;



	if (!smu->pm_enabled)

		return ret;



	if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) &&

	    smu->adev->gmc.vram_type == AMDGPU_VRAM_TYPE_HBM)

		ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetUclkFastSwitch, 1, NULL);

	if (!amdgpu_device_has_dc_support(smu->adev))

		ret = smu_cmn_send_smc_msg(smu, SMU_MSG_DALNotPresent, NULL);



	return ret;

}

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

+2 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] = 
	MSG_MAP(AllowGpo,			PPSMC_MSG_SetGpoAllow,           0),

	MSG_MAP(AllowIHHostInterrupt,		PPSMC_MSG_AllowIHHostInterrupt,       0),

	MSG_MAP(ReenableAcDcInterrupt,		PPSMC_MSG_ReenableAcDcInterrupt,       0),

	MSG_MAP(DALNotPresent,		PPSMC_MSG_DALNotPresent,       0),

};



static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT] = {
@@ -2687,6 +2688,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = { 
	.send_hbm_bad_channel_flag = smu_v13_0_0_send_bad_mem_channel_flag,

	.gpo_control = smu_v13_0_gpo_control,

	.get_ecc_info = smu_v13_0_0_get_ecc_info,

	.notify_display_change = smu_v13_0_notify_display_change,

};



void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)