Commit 8b592783 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

Thumb-2: Implement the unified arch/arm/lib functions 



This patch adds the ARM/Thumb-2 unified support for the arch/arm/lib/*
files.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 347c8b70

arch/arm/include/asm/assembler.h

+73 −0
Original line number Diff line number Diff line
@@ -138,3 +138,76 @@ 
	msr	cpsr_c, #\mode

	.endm

#endif



/*

 * STRT/LDRT access macros with ARM and Thumb-2 variants

 */

#ifdef CONFIG_THUMB2_KERNEL



	.macro	usraccoff, instr, reg, ptr, inc, off, cond, abort

9999:

	.if	\inc == 1

	\instr\cond\()bt \reg, [\ptr, #\off]

	.elseif	\inc == 4

	\instr\cond\()t \reg, [\ptr, #\off]

	.else

	.error	"Unsupported inc macro argument"

	.endif



	.section __ex_table,"a"

	.align	3

	.long	9999b, \abort

	.previous

	.endm



	.macro	usracc, instr, reg, ptr, inc, cond, rept, abort

	@ explicit IT instruction needed because of the label

	@ introduced by the USER macro

	.ifnc	\cond,al

	.if	\rept == 1

	itt	\cond

	.elseif	\rept == 2

	ittt	\cond

	.else

	.error	"Unsupported rept macro argument"

	.endif

	.endif



	@ Slightly optimised to avoid incrementing the pointer twice

	usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort

	.if	\rept == 2

	usraccoff \instr, \reg, \ptr, \inc, 4, \cond, \abort

	.endif



	add\cond \ptr, #\rept * \inc

	.endm



#else	/* !CONFIG_THUMB2_KERNEL */



	.macro	usracc, instr, reg, ptr, inc, cond, rept, abort

	.rept	\rept

9999:

	.if	\inc == 1

	\instr\cond\()bt \reg, [\ptr], #\inc

	.elseif	\inc == 4

	\instr\cond\()t \reg, [\ptr], #\inc

	.else

	.error	"Unsupported inc macro argument"

	.endif



	.section __ex_table,"a"

	.align	3

	.long	9999b, \abort

	.previous

	.endr

	.endm



#endif	/* CONFIG_THUMB2_KERNEL */



	.macro	strusr, reg, ptr, inc, cond=al, rept=1, abort=9001f

	usracc	str, \reg, \ptr, \inc, \cond, \rept, \abort

	.endm



	.macro	ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f

	usracc	ldr, \reg, \ptr, \inc, \cond, \rept, \abort

	.endm

arch/arm/include/asm/uaccess.h

+5 −2
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <asm/memory.h>

#include <asm/domain.h>

#include <asm/system.h>

#include <asm/unified.h>



#define VERIFY_READ 0

#define VERIFY_WRITE 1
@@ -365,8 +366,10 @@ do { \ 


#define __put_user_asm_dword(x,__pu_addr,err)			\

	__asm__ __volatile__(					\

	"1:	strt	" __reg_oper1 ", [%1], #4\n"		\

	"2:	strt	" __reg_oper0 ", [%1]\n"		\

 ARM(	"1:	strt	" __reg_oper1 ", [%1], #4\n"	)	\

 ARM(	"2:	strt	" __reg_oper0 ", [%1]\n"	)	\

 THUMB(	"1:	strt	" __reg_oper1 ", [%1]\n"	)	\

 THUMB(	"2:	strt	" __reg_oper0 ", [%1, #4]\n"	)	\

	"3:\n"							\

	"	.section .fixup,\"ax\"\n"			\

	"	.align	2\n"					\

arch/arm/lib/ashldi3.S

+3 −1
Original line number Diff line number Diff line
@@ -43,7 +43,9 @@ ENTRY(__aeabi_llsl) 
	rsb	ip, r2, #32

	movmi	ah, ah, lsl r2

	movpl	ah, al, lsl r3

	orrmi	ah, ah, al, lsr ip

 ARM(	orrmi	ah, ah, al, lsr ip	)

 THUMB(	lsrmi	r3, al, ip		)

 THUMB(	orrmi	ah, ah, r3		)

	mov	al, al, lsl r2

	mov	pc, lr

arch/arm/lib/ashrdi3.S

+3 −1
Original line number Diff line number Diff line
@@ -43,7 +43,9 @@ ENTRY(__aeabi_lasr) 
	rsb	ip, r2, #32

	movmi	al, al, lsr r2

	movpl	al, ah, asr r3

	orrmi	al, al, ah, lsl ip

 ARM(	orrmi	al, al, ah, lsl ip	)

 THUMB(	lslmi	r3, ah, ip		)

 THUMB(	orrmi	al, al, r3		)

	mov	ah, ah, asr r2

	mov	pc, lr

arch/arm/lib/backtrace.S

+6 −2
Original line number Diff line number Diff line
@@ -38,7 +38,9 @@ ENDPROC(c_backtrace) 
		beq	no_frame		@ we have no stack frames



		tst	r1, #0x10		@ 26 or 32-bit mode?

		moveq	mask, #0xfc000003	@ mask for 26-bit

 ARM(		moveq	mask, #0xfc000003	)

 THUMB(		moveq	mask, #0xfc000000	)

 THUMB(		orreq	mask, #0x03		)

		movne	mask, #0		@ mask for 32-bit



1:		stmfd	sp!, {pc}		@ calculate offset of PC stored
@@ -126,7 +128,9 @@ ENDPROC(c_backtrace) 
		mov	reg, #10

		mov	r7, #0

1:		mov	r3, #1

		tst	instr, r3, lsl reg

 ARM(		tst	instr, r3, lsl reg	)

 THUMB(		lsl	r3, reg			)

 THUMB(		tst	instr, r3		)

		beq	2f

		add	r7, r7, #1

		teq	r7, #6